FPGA Implementation of SAR Imaging Processing System

The miniaturized synthetic aperture radar (MiniSAR) signal processing system is designed and implemented in this paper, which is able to deal with chirped SAR signals based on FPGA. In this design, the Polar Format Algorithm (PFA) using the principle of chirp scaling (PCS) for range processing and Sinc interpolation for azimuth processing can achieve high precision results and increase speed significantly. Meanwhile, the phase gradient autofocus (PGA) and the geometric correction (GC) are applied to estimate and compensate for the residual phase error accurately and realize wavefront curvature correction caused by PFA. The system uses the Floating-Point IP cores and pipeline structure to achieve high-speed floating-point data computation, and uses a smart scheme to realize the transposition of matrix data demanded by the system algorithm with DDR3 SDRAM. The system is built on Virtex7-XC7VX690T evaluation board, and it takes 2.1s to obtain 4K*2K complex-image in single precision. Point target simulation has validated the presented methodology, and the real data processing results verify the reliability and stability of the proposed system.