{"title":"带MMSE谐波抑制均衡器的4相容错宽带接收机","authors":"Esmail Babakrpur, W. Namgoong","doi":"10.1109/RFIC.2016.7508296","DOIUrl":null,"url":null,"abstract":"This paper presents a blocker tolerant low-noise wideband receiver that employs digital harmonic rejection equalizer to suppress high order harmonic interferers. Unlike the commonly employed 8-phase harmonic rejection mixers (HRMs), the proposed wideband receiver suppresses any of the harmonic interferers including the seventh and ninth. The wideband receiver employs a two-path front-end structure, consisting of a highly linear mixer-first primary path and gm-first secondary path. An adaptive minimum mean-squared error (MMSE) harmonic rejection equalizer is employed that minimizes the desired signal distortion in the mean-squared error sense in the presence of arbitrary harmonic interferers and the correlated noise between the two paths. Using two sets of 4-phase clocks, a 100-1450MHz receiver that achieves HRR >75dB up to the ninth harmonic while being robust to mismatches is implemented.","PeriodicalId":163595,"journal":{"name":"2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A 4-phase blocker tolerant wideband receiver with MMSE harmonic rejection equalizer\",\"authors\":\"Esmail Babakrpur, W. Namgoong\",\"doi\":\"10.1109/RFIC.2016.7508296\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a blocker tolerant low-noise wideband receiver that employs digital harmonic rejection equalizer to suppress high order harmonic interferers. Unlike the commonly employed 8-phase harmonic rejection mixers (HRMs), the proposed wideband receiver suppresses any of the harmonic interferers including the seventh and ninth. The wideband receiver employs a two-path front-end structure, consisting of a highly linear mixer-first primary path and gm-first secondary path. An adaptive minimum mean-squared error (MMSE) harmonic rejection equalizer is employed that minimizes the desired signal distortion in the mean-squared error sense in the presence of arbitrary harmonic interferers and the correlated noise between the two paths. Using two sets of 4-phase clocks, a 100-1450MHz receiver that achieves HRR >75dB up to the ninth harmonic while being robust to mismatches is implemented.\",\"PeriodicalId\":163595,\"journal\":{\"name\":\"2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-05-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.2016.7508296\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2016.7508296","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 4-phase blocker tolerant wideband receiver with MMSE harmonic rejection equalizer
This paper presents a blocker tolerant low-noise wideband receiver that employs digital harmonic rejection equalizer to suppress high order harmonic interferers. Unlike the commonly employed 8-phase harmonic rejection mixers (HRMs), the proposed wideband receiver suppresses any of the harmonic interferers including the seventh and ninth. The wideband receiver employs a two-path front-end structure, consisting of a highly linear mixer-first primary path and gm-first secondary path. An adaptive minimum mean-squared error (MMSE) harmonic rejection equalizer is employed that minimizes the desired signal distortion in the mean-squared error sense in the presence of arbitrary harmonic interferers and the correlated noise between the two paths. Using two sets of 4-phase clocks, a 100-1450MHz receiver that achieves HRR >75dB up to the ninth harmonic while being robust to mismatches is implemented.