94GHz功率组合功率放大器，+13dBm饱和输出功率65nm CMOS

2011 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2011-06-05 DOI:10.1109/RFIC.2011.5940691

D. Sandstrom, B. Martineau, M. Varonen, M. Karkkainen, A. Cathelin, K. Halonen

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引用次数: 22

摘要

提出了一种基于级联码拓扑和变压器匹配元件的功率组合功率放大器。该放大器在94 GHz下使用标准1.2 V电源实现+13 dBm饱和输出功率，占用的有效面积仅为0.069 mm2。考虑到高输出功率水平下的可靠性问题，放大器采用工业65nm CMOS工艺实现。放大器在输入和输出端也有防静电保护。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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94GHz power-combining power amplifier with +13dBm saturated output power in 65nm CMOS

A power combining power amplifier utilizing cascode topology and transformer-based matching elements is presented in this paper. The amplifier achieves +13 dBm saturated output power at 94 GHz with a standard 1.2 V supply and occupies an active area of only 0.069 mm2. Amplifier is implemented in an industrial 65nm CMOS process taking into account reliability issues at high output power level. The amplifier is also ESD-protected at the input and at the output.

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2011 IEEE Radio Frequency Integrated Circuits Symposium

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