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引用次数: 2

摘要

提出了一种实时数字高清电视视频解码体系结构。我们的技术是基于双解码的数据路径控制在一个固定的时间表和一个有效的回写方案锚图。与其他解码方法(如切片条解码方法和交叉分割方法)不同,我们的方案减少了内存访问争用问题,实现了实时高清电视解码,而在整体解码器缓冲区、架构和总线方面的成本并不高。我们的仿真表明,在相对较低的速率81 MHz时钟下,我们的解码器可以实时解码MPEG-2 MP@HL HDTV,基于ATSC视频格式1920/spl次/1080像素/帧,30帧/秒,比特率为18至20 Mbit/s。
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A real-time HDTV video decoder
We present an architecture for real-time digital HDTV video decoding. Our technique is based on a dual decoding datapath controlled in a fixed schedule with an efficient write-back scheme for anchor pictures. Unlike other decoding approaches such as the slice bar decoding method and the crossing-divided method, our scheme reduces the memory access contention problem to achieve real-time HDTV decoding without a high cost in overall decoder buffers, architecture, and bus. Our simulation shows that with a relatively low rate 81 MHz clock, our decoder can decode MPEG-2 MP@HL HDTV in real-time, based on an ATSC video format of 1920/spl times/1080 pixels/frame at 30 frames/s, at a bit rate of 18 to 20 Mbit/s.
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A real-time HDTV video decoder A multi-level block priority based instruction caching scheme for multimedia processors Reliable low-power multimedia communication systems Design of Viterbi decoders with in-place state metric update and hybrid traceback processing Index-based RNS DWT architectures for custom IC designs
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