TLM 2.0模型的细化和重用:ESL成功的关键

Víctor Reyes
{"title":"TLM 2.0模型的细化和重用:ESL成功的关键","authors":"Víctor Reyes","doi":"10.1109/VDAT.2009.5158105","DOIUrl":null,"url":null,"abstract":"ESL design methods and tools are being proposed to improve the productivity of the designers and to bridge the design and verification gaps. The main area where ESL solutions are being successfully applied on current desire flows is Virtual Prototyping. The success of these methods relies on the rapidly adoption from Semiconductor industry and EDA vendors of standards such as SystemC and TLM 2.0. Ideally. TLM models must be accurate enough, fast enough and easy to create in order to fit all Virtual Prototype use-cases. However reality shows that different requirements are achieved only by using different type of models (the right model for the right use-case). This is because TLM modeling is a multidimensional problem where the different dimensions (speed, timing accuracy and modeling effort) are orthogonal with each other. Having to create and maintain a separated model for each use-case is drastically reducing the benefits of VP technology, due to elevated cost of creating and maintaining the models consistent with each other. Therefore, model reuse and refinement is a must for the suceess of ESL technology. This paper describes modeling concepts that can be used to create speed optimal models with low effort, which can be gradually refined with more timing accuracy and therefore reused for different VP use-cases.","PeriodicalId":246670,"journal":{"name":"2009 International Symposium on VLSI Design, Automation and Test","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Refinement and reuse of TLM 2.0 models: The key for ESL success\",\"authors\":\"Víctor Reyes\",\"doi\":\"10.1109/VDAT.2009.5158105\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"ESL design methods and tools are being proposed to improve the productivity of the designers and to bridge the design and verification gaps. The main area where ESL solutions are being successfully applied on current desire flows is Virtual Prototyping. The success of these methods relies on the rapidly adoption from Semiconductor industry and EDA vendors of standards such as SystemC and TLM 2.0. Ideally. TLM models must be accurate enough, fast enough and easy to create in order to fit all Virtual Prototype use-cases. However reality shows that different requirements are achieved only by using different type of models (the right model for the right use-case). This is because TLM modeling is a multidimensional problem where the different dimensions (speed, timing accuracy and modeling effort) are orthogonal with each other. Having to create and maintain a separated model for each use-case is drastically reducing the benefits of VP technology, due to elevated cost of creating and maintaining the models consistent with each other. Therefore, model reuse and refinement is a must for the suceess of ESL technology. This paper describes modeling concepts that can be used to create speed optimal models with low effort, which can be gradually refined with more timing accuracy and therefore reused for different VP use-cases.\",\"PeriodicalId\":246670,\"journal\":{\"name\":\"2009 International Symposium on VLSI Design, Automation and Test\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-04-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 International Symposium on VLSI Design, Automation and Test\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VDAT.2009.5158105\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Symposium on VLSI Design, Automation and Test","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VDAT.2009.5158105","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

ESL的设计方法和工具被提出来提高设计师的生产力,并弥合设计和验证的差距。ESL解决方案成功应用于当前需求流的主要领域是虚拟原型。这些方法的成功依赖于半导体行业和EDA供应商对SystemC和TLM 2.0等标准的快速采用。在理想的情况下。TLM模型必须足够准确、足够快速和易于创建,以适应所有虚拟原型用例。然而,现实表明,不同的需求只能通过使用不同类型的模型(为正确的用例使用正确的模型)来实现。这是因为TLM建模是一个多维问题,其中不同的维度(速度、计时精度和建模努力)彼此正交。必须为每个用例创建和维护一个分离的模型,这极大地降低了VP技术的好处,因为创建和维护彼此一致的模型的成本增加了。因此,模型重用和细化是ESL技术成功的必要条件。本文描述了一些建模概念,这些概念可以用于低成本地创建速度最优模型,这些模型可以逐渐细化,具有更高的定时精度,因此可以重用于不同的VP用例。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Refinement and reuse of TLM 2.0 models: The key for ESL success
ESL design methods and tools are being proposed to improve the productivity of the designers and to bridge the design and verification gaps. The main area where ESL solutions are being successfully applied on current desire flows is Virtual Prototyping. The success of these methods relies on the rapidly adoption from Semiconductor industry and EDA vendors of standards such as SystemC and TLM 2.0. Ideally. TLM models must be accurate enough, fast enough and easy to create in order to fit all Virtual Prototype use-cases. However reality shows that different requirements are achieved only by using different type of models (the right model for the right use-case). This is because TLM modeling is a multidimensional problem where the different dimensions (speed, timing accuracy and modeling effort) are orthogonal with each other. Having to create and maintain a separated model for each use-case is drastically reducing the benefits of VP technology, due to elevated cost of creating and maintaining the models consistent with each other. Therefore, model reuse and refinement is a must for the suceess of ESL technology. This paper describes modeling concepts that can be used to create speed optimal models with low effort, which can be gradually refined with more timing accuracy and therefore reused for different VP use-cases.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Fault-tolerant router with built-in self-test/self-diagnosis and fault-isolation circuits for 2D-mesh based chip multiprocessor systems An area efficient shared synapse cellular neural network for low power image processing A Network-on-Chip monitoring infrastructure for communication-centric debug of embedded multi-processor SoCs A gm/ID-based synthesis tool for pipelined analog to digital converters Microscopic wireless - Exploring the boundaries of ultra low-power design
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1