{"title":"高射频功率下CF/sub - 4/等离子体RIE硅刻蚀中刻蚀深度的饱和效应","authors":"A. Ehsan, S. Shaari, B. Y. Majlis","doi":"10.1109/SMELEC.2000.932468","DOIUrl":null,"url":null,"abstract":"The work presented here shows the effects of RF power of an RIE system on silicon etching. A p-type silicon [100] wafer is etched under four RF power levels, which are 40, 60, 80 and 100 W. The etch depth plotted shows a linear increase with RF power for a fixed etch time at low RF power. However, the etch depth shows a tendency to saturate at a higher RF power level. The behaviour is believed to be caused by the existence of a sheath layer when plasma is generated in the process chamber.","PeriodicalId":359114,"journal":{"name":"ICSE 2000. 2000 IEEE International Conference on Semiconductor Electronics. Proceedings (Cat. No.00EX425)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"The saturation effect of etch depth at high RF power in CF/sub 4/ plasma RIE silicon etching\",\"authors\":\"A. Ehsan, S. Shaari, B. Y. Majlis\",\"doi\":\"10.1109/SMELEC.2000.932468\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The work presented here shows the effects of RF power of an RIE system on silicon etching. A p-type silicon [100] wafer is etched under four RF power levels, which are 40, 60, 80 and 100 W. The etch depth plotted shows a linear increase with RF power for a fixed etch time at low RF power. However, the etch depth shows a tendency to saturate at a higher RF power level. The behaviour is believed to be caused by the existence of a sheath layer when plasma is generated in the process chamber.\",\"PeriodicalId\":359114,\"journal\":{\"name\":\"ICSE 2000. 2000 IEEE International Conference on Semiconductor Electronics. Proceedings (Cat. No.00EX425)\",\"volume\":\"3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-11-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ICSE 2000. 2000 IEEE International Conference on Semiconductor Electronics. Proceedings (Cat. No.00EX425)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SMELEC.2000.932468\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ICSE 2000. 2000 IEEE International Conference on Semiconductor Electronics. Proceedings (Cat. No.00EX425)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMELEC.2000.932468","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The saturation effect of etch depth at high RF power in CF/sub 4/ plasma RIE silicon etching
The work presented here shows the effects of RF power of an RIE system on silicon etching. A p-type silicon [100] wafer is etched under four RF power levels, which are 40, 60, 80 and 100 W. The etch depth plotted shows a linear increase with RF power for a fixed etch time at low RF power. However, the etch depth shows a tendency to saturate at a higher RF power level. The behaviour is believed to be caused by the existence of a sheath layer when plasma is generated in the process chamber.
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