基于mram的NB-LDPC解码器记忆系统

2017 29th International Conference on Microelectronics (ICM) Pub Date : 2017-12-01 DOI:10.1109/ICM.2017.8268886

Mohammad Sabbah, A. Ghouwayel, Mostafa Rizk, Z. El-Bazzal

{"title":"基于mram的NB-LDPC解码器记忆系统","authors":"Mohammad Sabbah, A. Ghouwayel, Mostafa Rizk, Z. El-Bazzal","doi":"10.1109/ICM.2017.8268886","DOIUrl":null,"url":null,"abstract":"This paper presents a novel implementation of the memorization system of the Non-Binary LDPC Decoder. The proposed approach relies on new implementations of STT-MRAM with power gating capabilities. A new data mapping has been defined to fit in with the physical dimensions of these implementations. The decoder adopting the devised memorization system has been compared to SRAM-based one which is used in almost all traditional decoders in order to demonstrate the feasibility of using power-gated MRAM. The obtained results show a significant reduction in the consumed energy by the memory reaching up to 78.45%.","PeriodicalId":115975,"journal":{"name":"2017 29th International Conference on Microelectronics (ICM)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"MRAM-based memorization system for NB-LDPC decoder\",\"authors\":\"Mohammad Sabbah, A. Ghouwayel, Mostafa Rizk, Z. El-Bazzal\",\"doi\":\"10.1109/ICM.2017.8268886\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a novel implementation of the memorization system of the Non-Binary LDPC Decoder. The proposed approach relies on new implementations of STT-MRAM with power gating capabilities. A new data mapping has been defined to fit in with the physical dimensions of these implementations. The decoder adopting the devised memorization system has been compared to SRAM-based one which is used in almost all traditional decoders in order to demonstrate the feasibility of using power-gated MRAM. The obtained results show a significant reduction in the consumed energy by the memory reaching up to 78.45%.\",\"PeriodicalId\":115975,\"journal\":{\"name\":\"2017 29th International Conference on Microelectronics (ICM)\",\"volume\":\"27 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 29th International Conference on Microelectronics (ICM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICM.2017.8268886\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 29th International Conference on Microelectronics (ICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICM.2017.8268886","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 1

摘要

本文提出了一种非二进制LDPC解码器记忆系统的新实现方法。所提出的方法依赖于具有功率门控功能的STT-MRAM的新实现。已经定义了一个新的数据映射，以适应这些实现的物理维度。采用所设计的记忆系统的解码器与几乎所有传统解码器中使用的基于sram的解码器进行了比较，以证明使用功率门控MRAM的可行性。得到的结果表明，存储器的能耗显著降低，最高可达78.45%。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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MRAM-based memorization system for NB-LDPC decoder

This paper presents a novel implementation of the memorization system of the Non-Binary LDPC Decoder. The proposed approach relies on new implementations of STT-MRAM with power gating capabilities. A new data mapping has been defined to fit in with the physical dimensions of these implementations. The decoder adopting the devised memorization system has been compared to SRAM-based one which is used in almost all traditional decoders in order to demonstrate the feasibility of using power-gated MRAM. The obtained results show a significant reduction in the consumed energy by the memory reaching up to 78.45%.

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2017 29th International Conference on Microelectronics (ICM)

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