Pub Date : 2017-12-10DOI: 10.1109/ICM.2017.8268887
Gaby Abou Haidar, R. A. Z. Daou, X. Moreau
This paper introduces a fractional order audio band pass boost filter. The boost filter is part of the equalizer along with the cut filter: the first (e.g. the boost) is a band pass filter whereas the second is a stop band filter. These types of audio filters are widely used for their effectiveness in removing noise and echo. This paper will treat the boost filter only. The integer order filter will be first introduced. Then, the fractional order form — which has less number of parameters — along with its rationalization and its discrete form will be presented. The main advantages of using the fractional form will be also shown. A comparison between the initial audio file spectrum and the two synthesized filters (integer and fractional) will be presented and analyzed. Results showed that dealing with fractional orders will increase the selectivity and makes the filter more tunable but at the cost of gain which can be compromised using an amplifier.
{"title":"Synthesis of a fractional order audio boost filter","authors":"Gaby Abou Haidar, R. A. Z. Daou, X. Moreau","doi":"10.1109/ICM.2017.8268887","DOIUrl":"https://doi.org/10.1109/ICM.2017.8268887","url":null,"abstract":"This paper introduces a fractional order audio band pass boost filter. The boost filter is part of the equalizer along with the cut filter: the first (e.g. the boost) is a band pass filter whereas the second is a stop band filter. These types of audio filters are widely used for their effectiveness in removing noise and echo. This paper will treat the boost filter only. The integer order filter will be first introduced. Then, the fractional order form — which has less number of parameters — along with its rationalization and its discrete form will be presented. The main advantages of using the fractional form will be also shown. A comparison between the initial audio file spectrum and the two synthesized filters (integer and fractional) will be presented and analyzed. Results showed that dealing with fractional orders will increase the selectivity and makes the filter more tunable but at the cost of gain which can be compromised using an amplifier.","PeriodicalId":115975,"journal":{"name":"2017 29th International Conference on Microelectronics (ICM)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131819645","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-12-10DOI: 10.1109/ICM.2017.8268895
M. E. Gibari, C. Bleis, Guillaume Lirzin, B. Lauzier, S. Ginestar, J. Tissier, M. Latrach, Chantal Gautier, Hongwu Li
This paper reports on three low cost analog solutions for compensating thermal drift of piezoresistive implantable blood pressure sensors. Body temperature variations distort blood pressure measurements due to pyroelectric effect. It's therefore indispensable to compensate thermal drift of the used sensors. Compensating techniques should be low cost, compact and have low consumption. We present in the paper three thermal drift compensation techniques respectively based on a current source LM334, negative temperature coefficient thermistors and a combination of negative temperature coefficient thermistors and a current source LM334. The first compensation technique gives a lower thermal drift coefficient (Vout/°C) than the two last techniques over a large pressure range. The first and the second technique can cancel thermal drift over different pressure ranges.
{"title":"Thermal drift compensation of piezoresistive implantable blood pressure sensors with low cost analog solutions","authors":"M. E. Gibari, C. Bleis, Guillaume Lirzin, B. Lauzier, S. Ginestar, J. Tissier, M. Latrach, Chantal Gautier, Hongwu Li","doi":"10.1109/ICM.2017.8268895","DOIUrl":"https://doi.org/10.1109/ICM.2017.8268895","url":null,"abstract":"This paper reports on three low cost analog solutions for compensating thermal drift of piezoresistive implantable blood pressure sensors. Body temperature variations distort blood pressure measurements due to pyroelectric effect. It's therefore indispensable to compensate thermal drift of the used sensors. Compensating techniques should be low cost, compact and have low consumption. We present in the paper three thermal drift compensation techniques respectively based on a current source LM334, negative temperature coefficient thermistors and a combination of negative temperature coefficient thermistors and a current source LM334. The first compensation technique gives a lower thermal drift coefficient (Vout/°C) than the two last techniques over a large pressure range. The first and the second technique can cancel thermal drift over different pressure ranges.","PeriodicalId":115975,"journal":{"name":"2017 29th International Conference on Microelectronics (ICM)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128926230","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-12-10DOI: 10.1109/ICM.2017.8268876
M. Ayoub, M. Alloush, Ali Mohsen, A. Harb, N. Deltimple, Abraham Serhane
Nowadays, technological demands are exponentially and rapidly growing. The telecommunication market examines a growing demand for RF mobile devices where high latency performances are targeted. The power amplifier is a major element of the radio frequency front-end especially if power consumption and bandwidth are considered. This paper presents the design of mm-wave power amplifier for the candidate of 5G using both Common Source Class-AB and Class-J topologies by means of the 28-nm UTBB FD-SOI technology under body bias technique. Upon taking into consideration the parasitic extraction of the transistor, RF pads, and interconnection to ground, a comparison is made and the theoretical effectiveness of Class-J topology for single stage large signal amplification is simulated practically. Moreover, two distinct transistor widths 250 μm and 350 μm are simulated where each has its own topology to study the impact of increasing the width on the performance of the Power Amplifier. While 5G spectral band is not yet specified and determined; recent studies proved that the 28 GHz band is particularly effective for 5G mobile standardization. Thus, the 28 GHz band is chosen as the fundamental frequency of the operation for this work.
{"title":"Class AB vs. class J 5G power amplifier in 28-nm UTBB FD-SOI technology for high efficiency operation","authors":"M. Ayoub, M. Alloush, Ali Mohsen, A. Harb, N. Deltimple, Abraham Serhane","doi":"10.1109/ICM.2017.8268876","DOIUrl":"https://doi.org/10.1109/ICM.2017.8268876","url":null,"abstract":"Nowadays, technological demands are exponentially and rapidly growing. The telecommunication market examines a growing demand for RF mobile devices where high latency performances are targeted. The power amplifier is a major element of the radio frequency front-end especially if power consumption and bandwidth are considered. This paper presents the design of mm-wave power amplifier for the candidate of 5G using both Common Source Class-AB and Class-J topologies by means of the 28-nm UTBB FD-SOI technology under body bias technique. Upon taking into consideration the parasitic extraction of the transistor, RF pads, and interconnection to ground, a comparison is made and the theoretical effectiveness of Class-J topology for single stage large signal amplification is simulated practically. Moreover, two distinct transistor widths 250 μm and 350 μm are simulated where each has its own topology to study the impact of increasing the width on the performance of the Power Amplifier. While 5G spectral band is not yet specified and determined; recent studies proved that the 28 GHz band is particularly effective for 5G mobile standardization. Thus, the 28 GHz band is chosen as the fundamental frequency of the operation for this work.","PeriodicalId":115975,"journal":{"name":"2017 29th International Conference on Microelectronics (ICM)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134116682","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-12-10DOI: 10.1109/ICM.2017.8268822
Hassan Termos, T. Rampone, A. Sharaiha, A. Hamie, A. Alaeddine
Up and down frequency conversions are performed in the range 0.5–39.5 GHz with an Orthogonal Frequency Division Multiplexing data format by using a Semiconductor Optical Amplifier Mach-Zehnder Interferometer. Frequency conversion is achieved by the sampling technique using an optical pulse source at a sampling frequency of 7.8 GHz with 10-ps width optical pulses. Characterizations of the quality of the OFDM signal up and down conversions are done for different target frequencies, symbol rates, and numbers of subcarriers. We show that the maximum bit rate can attain up to 245.76 Mb/s for both up and down conversions.
{"title":"OFDM signal up and down frequency conversions by a sampling method using a SOA-MZI","authors":"Hassan Termos, T. Rampone, A. Sharaiha, A. Hamie, A. Alaeddine","doi":"10.1109/ICM.2017.8268822","DOIUrl":"https://doi.org/10.1109/ICM.2017.8268822","url":null,"abstract":"Up and down frequency conversions are performed in the range 0.5–39.5 GHz with an Orthogonal Frequency Division Multiplexing data format by using a Semiconductor Optical Amplifier Mach-Zehnder Interferometer. Frequency conversion is achieved by the sampling technique using an optical pulse source at a sampling frequency of 7.8 GHz with 10-ps width optical pulses. Characterizations of the quality of the OFDM signal up and down conversions are done for different target frequencies, symbol rates, and numbers of subcarriers. We show that the maximum bit rate can attain up to 245.76 Mb/s for both up and down conversions.","PeriodicalId":115975,"journal":{"name":"2017 29th International Conference on Microelectronics (ICM)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121501054","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-12-10DOI: 10.1109/ICM.2017.8268832
Ramez Hamié, L. Ghisa, V. Quintard, M. Guegan, A. Pérennou, M. Fadlallah, A. Hamie
In previous papers, the authors proposed a flexible solution to extend a fixed, cabled seabed observatory with a single mode optical fiber transporting both energy and data, over several kilometers. The main topic of this paper is the optimization of the physical parameters used in our numerical model of optical propagation, in order to obtain the best fit between simulation and experimental characterization. This should facilitate the development of new network topologies.
{"title":"Physical parameter adjustment for a power over fiber device with a self-developed numerical model of optical propagation in the seafloor observatory context","authors":"Ramez Hamié, L. Ghisa, V. Quintard, M. Guegan, A. Pérennou, M. Fadlallah, A. Hamie","doi":"10.1109/ICM.2017.8268832","DOIUrl":"https://doi.org/10.1109/ICM.2017.8268832","url":null,"abstract":"In previous papers, the authors proposed a flexible solution to extend a fixed, cabled seabed observatory with a single mode optical fiber transporting both energy and data, over several kilometers. The main topic of this paper is the optimization of the physical parameters used in our numerical model of optical propagation, in order to obtain the best fit between simulation and experimental characterization. This should facilitate the development of new network topologies.","PeriodicalId":115975,"journal":{"name":"2017 29th International Conference on Microelectronics (ICM)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127649772","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-12-10DOI: 10.1109/ICM.2017.8268868
Saleem Hamady, B. Beydoun, F. Morancho
High electron mobility transistors based on Gallium Nitride are promising devices for high frequency and high-power applications. While switching applications demand normally-off operation, conventional HEMTs possess a channel populated with electrons at zero gate voltage making them normally-on. By implanting fluorine below the channel, normally-off operation can be achieved. However, at high gate voltages, a drop in the transconductance is obtained due to electron migration from the AlGaN/GaN interface to the insulator/AlGaN interface. In this work, to recover the drop in the transconductance and hence increase the current density, an AlN interlayer is introduced between the AlGaN and GaN layers to block electron migration.
{"title":"A solution for channel electron migration in normally-off MIS-HEMT with buried fluorine ions","authors":"Saleem Hamady, B. Beydoun, F. Morancho","doi":"10.1109/ICM.2017.8268868","DOIUrl":"https://doi.org/10.1109/ICM.2017.8268868","url":null,"abstract":"High electron mobility transistors based on Gallium Nitride are promising devices for high frequency and high-power applications. While switching applications demand normally-off operation, conventional HEMTs possess a channel populated with electrons at zero gate voltage making them normally-on. By implanting fluorine below the channel, normally-off operation can be achieved. However, at high gate voltages, a drop in the transconductance is obtained due to electron migration from the AlGaN/GaN interface to the insulator/AlGaN interface. In this work, to recover the drop in the transconductance and hence increase the current density, an AlN interlayer is introduced between the AlGaN and GaN layers to block electron migration.","PeriodicalId":115975,"journal":{"name":"2017 29th International Conference on Microelectronics (ICM)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123955891","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-12-01DOI: 10.1109/ICM.2017.8268871
Hesham A. Ameen, Kareem Abdelmonem, Mohamed A. Elgamal, M. A. Mousa, O. Hamada, Yahia A. Zakaria, M. Abdalla
A Fully integrated 4-element symmetrical TX/RX RF integrated circuit for 26–30 GHz 5G beam-forming system is implemented in 65-nm CMOS technology. Each array element is digitally controlled with 5.625° step and 2 dB gain step. The system employs a heterodyne architecture with 6 GHz intermediate frequency (IF). The up-conversion and down-conversion mixers are integrated on the same chip with a shared LO driver chain. The phased-array power combining/splitting is done using Wilkinson combiner/divider. The RFIC features 3.4 to 3.9 dB noise figure and −5 to −3.5 dBm IIP3 in RX mode, 18 dB maximum power gain and OP1dB of 14.7 dBm per chain in TX mode. The maximum root mean square amplitude and phase error of each array element is 0.25 dB and 1.5°, respectively. The RFIC area is 18 mm2 including pads and it consumes 240 mW per TX chain, 120 mW per RX chain and 174 mW for the LO amplifier with total power of 1.58 W from a 1.2 V supply.
{"title":"A 28 GHz four-channel phased-array transceiver in 65-nm CMOS technology for 5G applications","authors":"Hesham A. Ameen, Kareem Abdelmonem, Mohamed A. Elgamal, M. A. Mousa, O. Hamada, Yahia A. Zakaria, M. Abdalla","doi":"10.1109/ICM.2017.8268871","DOIUrl":"https://doi.org/10.1109/ICM.2017.8268871","url":null,"abstract":"A Fully integrated 4-element symmetrical TX/RX RF integrated circuit for 26–30 GHz 5G beam-forming system is implemented in 65-nm CMOS technology. Each array element is digitally controlled with 5.625° step and 2 dB gain step. The system employs a heterodyne architecture with 6 GHz intermediate frequency (IF). The up-conversion and down-conversion mixers are integrated on the same chip with a shared LO driver chain. The phased-array power combining/splitting is done using Wilkinson combiner/divider. The RFIC features 3.4 to 3.9 dB noise figure and −5 to −3.5 dBm IIP3 in RX mode, 18 dB maximum power gain and OP1dB of 14.7 dBm per chain in TX mode. The maximum root mean square amplitude and phase error of each array element is 0.25 dB and 1.5°, respectively. The RFIC area is 18 mm2 including pads and it consumes 240 mW per TX chain, 120 mW per RX chain and 174 mW for the LO amplifier with total power of 1.58 W from a 1.2 V supply.","PeriodicalId":115975,"journal":{"name":"2017 29th International Conference on Microelectronics (ICM)","volume":"230 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116967275","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-12-01DOI: 10.1109/ICM.2017.8268867
O. Saad, A. Shalaby, M. Sayed
Earthquake Early Warning System (EEWS) greatly affects diminishing the mischief impacts coming about because of earthquakes, for example, human demise, atomic spillage, tainting of water, and properties harm. In this paper, we proposed a novel approach to detect the start of the earthquakes which is the main module in the EEWS. Our proposed algorithm based on dividing the seismic event into two parts noise and seismic signal. This target can be achieved using the segmentation techniques. In segmentation algorithm, we separated the seismic noise from the seismic signal and set the edge between those two categories as the onset time. We propose to use LOG transformation as a segmentation tool because its advantages in reducing the skew of the input data and use a hard decision threshold to detect the onset time. The proposed algorithm is simple and has high accuracy on picking the onset time of the earthquake. Our algorithm achieved an onset picking accuracy of 90.1 % with a standard deviation error of 0.10 seconds for 407 seismic field waveforms. Also, the proposed algorithm is hardware friendly, and a simple implementation is presented in this paper for it on a cheap FPGA kit. The implemented algorithm is compatible with the on-site and network approaches for implementing the EEWS.
{"title":"Automatic arrival time detection for earthquakes based on logarithmic transformation","authors":"O. Saad, A. Shalaby, M. Sayed","doi":"10.1109/ICM.2017.8268867","DOIUrl":"https://doi.org/10.1109/ICM.2017.8268867","url":null,"abstract":"Earthquake Early Warning System (EEWS) greatly affects diminishing the mischief impacts coming about because of earthquakes, for example, human demise, atomic spillage, tainting of water, and properties harm. In this paper, we proposed a novel approach to detect the start of the earthquakes which is the main module in the EEWS. Our proposed algorithm based on dividing the seismic event into two parts noise and seismic signal. This target can be achieved using the segmentation techniques. In segmentation algorithm, we separated the seismic noise from the seismic signal and set the edge between those two categories as the onset time. We propose to use LOG transformation as a segmentation tool because its advantages in reducing the skew of the input data and use a hard decision threshold to detect the onset time. The proposed algorithm is simple and has high accuracy on picking the onset time of the earthquake. Our algorithm achieved an onset picking accuracy of 90.1 % with a standard deviation error of 0.10 seconds for 407 seismic field waveforms. Also, the proposed algorithm is hardware friendly, and a simple implementation is presented in this paper for it on a cheap FPGA kit. The implemented algorithm is compatible with the on-site and network approaches for implementing the EEWS.","PeriodicalId":115975,"journal":{"name":"2017 29th International Conference on Microelectronics (ICM)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125383801","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-12-01DOI: 10.1109/ICM.2017.8268830
Fadel Kawtharani, Ali Kawtharani, M. Hammoud, A. Hallal, A. Shaito, A. Assi, I. Assi
High temperature can result in the degradation of any device (solar, electrical, electronics, etc.). For example, in the case of a silicon photovoltaic (PV) system, approximately 25% of the incoming concentrated solar energy will be converted into electrical energy and the remaining is converted into waste heat which contributes to elevate the cell temperature and so decreases its efficiency. The main objective of this project is to emphasize the Phase Change Material (PCM) cooling technique. This kind of material is known for its high storing capacity of the temperature which will enhance the cycle lifetime of any device. In this project, a direct application on a PV panel was carried out, an organic PCM is tested in order to study its properties and capacity of absorption. The results shows that around 13% of the energy can be saved. Another objective of this project consists of a numerical validation of the modeling used to determine the temperature of a photovoltaic panel. This validation allows us to use this model in order to decide on the efficiency of any PCM to be used.
{"title":"Cooling PV modules using phase change material","authors":"Fadel Kawtharani, Ali Kawtharani, M. Hammoud, A. Hallal, A. Shaito, A. Assi, I. Assi","doi":"10.1109/ICM.2017.8268830","DOIUrl":"https://doi.org/10.1109/ICM.2017.8268830","url":null,"abstract":"High temperature can result in the degradation of any device (solar, electrical, electronics, etc.). For example, in the case of a silicon photovoltaic (PV) system, approximately 25% of the incoming concentrated solar energy will be converted into electrical energy and the remaining is converted into waste heat which contributes to elevate the cell temperature and so decreases its efficiency. The main objective of this project is to emphasize the Phase Change Material (PCM) cooling technique. This kind of material is known for its high storing capacity of the temperature which will enhance the cycle lifetime of any device. In this project, a direct application on a PV panel was carried out, an organic PCM is tested in order to study its properties and capacity of absorption. The results shows that around 13% of the energy can be saved. Another objective of this project consists of a numerical validation of the modeling used to determine the temperature of a photovoltaic panel. This validation allows us to use this model in order to decide on the efficiency of any PCM to be used.","PeriodicalId":115975,"journal":{"name":"2017 29th International Conference on Microelectronics (ICM)","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126971272","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-12-01DOI: 10.1109/ICM.2017.8268850
M. Hmada, A. Mohieldin, E. Hasaneen, H. Hamed
In this paper, a new architecture of a fully integrated low-dropout voltage regulator (LDO) is presented. It is composed of hybrid architecture of NMOS/PMOS power transistors to relax stability requirements and enhance the transient response of the system. The LDO is designed in UMC 130 nm CMOS technology and is capable of producing a stable output voltage of 1.1 V from 1.3 V single supply with recovery settling time s 500 nsec. The LDO can supply current from 10 μA to 100 mA consuming quiescent current of 23.7 μA and 83.5 μA, respectively. The performance of the proposed technique is compared with other reported techniques and gives a better performance. It can support load capacitance from 0–50 pF with phase margin that increases from 47° at low load (10 μA) to 80° at high load (100 mA) and power supply rejection ratio (PSRR) less than −9 dB up to 1 MHz.
{"title":"A hybrid NMOS/PMOS low-dropout regulator with fast transient response for SoC applications","authors":"M. Hmada, A. Mohieldin, E. Hasaneen, H. Hamed","doi":"10.1109/ICM.2017.8268850","DOIUrl":"https://doi.org/10.1109/ICM.2017.8268850","url":null,"abstract":"In this paper, a new architecture of a fully integrated low-dropout voltage regulator (LDO) is presented. It is composed of hybrid architecture of NMOS/PMOS power transistors to relax stability requirements and enhance the transient response of the system. The LDO is designed in UMC 130 nm CMOS technology and is capable of producing a stable output voltage of 1.1 V from 1.3 V single supply with recovery settling time s 500 nsec. The LDO can supply current from 10 μA to 100 mA consuming quiescent current of 23.7 μA and 83.5 μA, respectively. The performance of the proposed technique is compared with other reported techniques and gives a better performance. It can support load capacitance from 0–50 pF with phase margin that increases from 47° at low load (10 μA) to 80° at high load (100 mA) and power supply rejection ratio (PSRR) less than −9 dB up to 1 MHz.","PeriodicalId":115975,"journal":{"name":"2017 29th International Conference on Microelectronics (ICM)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115253202","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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