P. Devoge, H. Aziza, P. Lorenzini, F. Julien, A. Marzaki, A. Malherbe, M. Mantelli, Thomas Sardin, S. Haendler, A. Régnier, S. Niel
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引用次数: 4
摘要
这项工作提出了一种新的晶体管架构,通过重用嵌入式非易失性存储器(eNVM) CMOS技术中已有的制造工艺步骤来开发。所提出的晶体管源自现有的高压晶体管,并且在光罩和工艺步骤方面是免费的,使其成为低成本产品的理想选择。该新型晶体管在制备过程中表现出良好的模拟性能。开发了新器件的SPICE (Integrated Circuit Simulation Program with Integrated Circuit Emphasis)模型,通过电路仿真来评估其电路级性能。基于不同的环形振荡器电路,对新器件的在线性能进行了评估。通过与现有高压晶体管的振荡频率等性能参数的比较,证明了新型晶体管的吸引力。
Circuit-level evaluation of a new zero-cost transistor in an embedded non-volatile memory CMOS technology
This work presents a new transistor architecture developed by reusing already existing fabrication process steps in an embedded non-volatile memory (eNVM) CMOS technology. The proposed transistor is derived from an existing high-voltage transistor and is free in terms of photomasks and process steps, making it ideal for low-cost products. The new transistor is fabricated then electrically characterized, showing good analog performances. A SPICE (Simulation Program with Integrated Circuit Emphasis) model of the new device is developed to assess its circuit-level performances through electrical circuit simulation. The in-circuit performances of the new device are evaluated based on different ring oscillator circuits. A comparison with the existing high-voltage transistor is carried out considering performance parameters such as the oscillating frequency to demonstrate the appeal of our new transistor.