{"title":"算法下流舍入标准对FDTD建模速度的影响","authors":"M. Sypniewski, W. Gwarek","doi":"10.1109/MWSYM.2004.1338949","DOIUrl":null,"url":null,"abstract":"This paper presents the influence of arithmetic underflow rounding operations on the speed of FDTD analysis. It is shown that the underflow treatment according to the IEEE standard 754 (commonly accepted and implemented in modern arithmetic processors) may sometimes result in drastic slowdown of the speed of computing. The effect is much more pronounced in some of the most modern and most used processors. The ways to circumvent the effect by specific software operations are discussed.","PeriodicalId":334675,"journal":{"name":"2004 IEEE MTT-S International Microwave Symposium Digest (IEEE Cat. No.04CH37535)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"On the influence of arithmetic underflow rounding standard on the speed of FDTD modeling\",\"authors\":\"M. Sypniewski, W. Gwarek\",\"doi\":\"10.1109/MWSYM.2004.1338949\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the influence of arithmetic underflow rounding operations on the speed of FDTD analysis. It is shown that the underflow treatment according to the IEEE standard 754 (commonly accepted and implemented in modern arithmetic processors) may sometimes result in drastic slowdown of the speed of computing. The effect is much more pronounced in some of the most modern and most used processors. The ways to circumvent the effect by specific software operations are discussed.\",\"PeriodicalId\":334675,\"journal\":{\"name\":\"2004 IEEE MTT-S International Microwave Symposium Digest (IEEE Cat. No.04CH37535)\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-06-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2004 IEEE MTT-S International Microwave Symposium Digest (IEEE Cat. No.04CH37535)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MWSYM.2004.1338949\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 IEEE MTT-S International Microwave Symposium Digest (IEEE Cat. No.04CH37535)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSYM.2004.1338949","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
On the influence of arithmetic underflow rounding standard on the speed of FDTD modeling
This paper presents the influence of arithmetic underflow rounding operations on the speed of FDTD analysis. It is shown that the underflow treatment according to the IEEE standard 754 (commonly accepted and implemented in modern arithmetic processors) may sometimes result in drastic slowdown of the speed of computing. The effect is much more pronounced in some of the most modern and most used processors. The ways to circumvent the effect by specific software operations are discussed.
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