阿卡迪亚视觉处理器

G. V. D. Wal, M. W. Hansen, M. Piacentino
{"title":"阿卡迪亚视觉处理器","authors":"G. V. D. Wal, M. W. Hansen, M. Piacentino","doi":"10.1109/CAMP.2000.875956","DOIUrl":null,"url":null,"abstract":"Presented is a new 80 GOPS video-processing chip capable of performing video rate vision applications. These applications include real-time video stabilization, mosaicking, video fusion, motion-stereo and video enhancement. The new vision chip, code-named Acadia, is the result of over 15 years of research and development by Sarnoff in the areas of multi-resolution pyramid-based vision processing and efficient computational architectures. The Acadia chip represents the third generation of ASIC technology developed by Sarnoff, and incorporates the processing functions found in Sarnoff's earlier PYR-1 and PYR-2 pyramid processing chips as well as numerous other functions found in Sarnoff-developed video processing systems, including the PVT200. A demonstration board is being implemented and includes two video decoders, a video encoder and a PCI interface.","PeriodicalId":282003,"journal":{"name":"Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"55","resultStr":"{\"title\":\"The Acadia vision processor\",\"authors\":\"G. V. D. Wal, M. W. Hansen, M. Piacentino\",\"doi\":\"10.1109/CAMP.2000.875956\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Presented is a new 80 GOPS video-processing chip capable of performing video rate vision applications. These applications include real-time video stabilization, mosaicking, video fusion, motion-stereo and video enhancement. The new vision chip, code-named Acadia, is the result of over 15 years of research and development by Sarnoff in the areas of multi-resolution pyramid-based vision processing and efficient computational architectures. The Acadia chip represents the third generation of ASIC technology developed by Sarnoff, and incorporates the processing functions found in Sarnoff's earlier PYR-1 and PYR-2 pyramid processing chips as well as numerous other functions found in Sarnoff-developed video processing systems, including the PVT200. A demonstration board is being implemented and includes two video decoders, a video encoder and a PCI interface.\",\"PeriodicalId\":282003,\"journal\":{\"name\":\"Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception\",\"volume\":\"35 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-09-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"55\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CAMP.2000.875956\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CAMP.2000.875956","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 55

摘要

提出了一种新型80gops视频处理芯片,能够实现视频速率视觉应用。这些应用包括实时视频稳定、拼接、视频融合、运动立体和视频增强。这种新的视觉芯片代号为Acadia,是Sarnoff在基于多分辨率金字塔的视觉处理和高效计算架构领域超过15年的研究和开发的结果。Acadia芯片代表了Sarnoff开发的第三代ASIC技术,并结合了Sarnoff早期PYR-1和PYR-2金字塔处理芯片中的处理功能,以及Sarnoff开发的视频处理系统(包括PVT200)中的许多其他功能。演示板包括两个视频解码器、一个视频编码器和一个PCI接口。
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The Acadia vision processor
Presented is a new 80 GOPS video-processing chip capable of performing video rate vision applications. These applications include real-time video stabilization, mosaicking, video fusion, motion-stereo and video enhancement. The new vision chip, code-named Acadia, is the result of over 15 years of research and development by Sarnoff in the areas of multi-resolution pyramid-based vision processing and efficient computational architectures. The Acadia chip represents the third generation of ASIC technology developed by Sarnoff, and incorporates the processing functions found in Sarnoff's earlier PYR-1 and PYR-2 pyramid processing chips as well as numerous other functions found in Sarnoff-developed video processing systems, including the PVT200. A demonstration board is being implemented and includes two video decoders, a video encoder and a PCI interface.
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