采用电荷共享技术的低功耗SRAM设计

2005 6th International Conference on ASIC Pub Date : 2005-10-24 DOI:10.1109/ICASIC.2005.1611260

Gu Ming, Yang Jun, Xue Jun

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引用次数: 15

摘要

本文介绍了一种采用电荷共享技术的低功耗写入方案。通过减小位线电压摆幅，降低位线动态功率。讨论了存储单元的静态噪声裕度(SNM)，证明了该方案的可行性。仿真结果表明，与传统SRAM相比，该SRAM在写周期内可节省20%以上的动态功率

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Low power SRAM design using charge sharing technique

This paper describes a low-power write scheme by adopting charge sharing technique. By reducing the bit lines voltage swing, the bit lines dynamic power is reduced. The memory cell's static noise margin (SNM) is discussed to prove it is a feasible scheme. Simulation results show compare to conventional SRAM, in write cycle this SRAM saves more than 20% dynamic power

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2005 6th International Conference on ASIC

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