F. Chouard, S. More, M. Fulde, D. Schmitt-Landsiedel
{"title":"基于先进CMOS技术的差分放大器老化抑制与校准方法","authors":"F. Chouard, S. More, M. Fulde, D. Schmitt-Landsiedel","doi":"10.1109/ESSCIRC.2011.6044954","DOIUrl":null,"url":null,"abstract":"Stress experiments are presented on analog size devices in inversion and accumulation mode, including relaxing stress phenomena. Based on these data, a general concept to suppress device aging impact on differential amplifier circuits in advanced CMOS technologies is presented and proven experimentally. It is shown that the proposed method also enables to compensate for process variation induced mismatch. Thus it provides analog circuit designers the opportunity to reduce matching related area requirements.","PeriodicalId":239979,"journal":{"name":"2011 Proceedings of the ESSCIRC (ESSCIRC)","volume":"122 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"An aging suppression and calibration approach for differential amplifiers in advanced CMOS technologies\",\"authors\":\"F. Chouard, S. More, M. Fulde, D. Schmitt-Landsiedel\",\"doi\":\"10.1109/ESSCIRC.2011.6044954\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Stress experiments are presented on analog size devices in inversion and accumulation mode, including relaxing stress phenomena. Based on these data, a general concept to suppress device aging impact on differential amplifier circuits in advanced CMOS technologies is presented and proven experimentally. It is shown that the proposed method also enables to compensate for process variation induced mismatch. Thus it provides analog circuit designers the opportunity to reduce matching related area requirements.\",\"PeriodicalId\":239979,\"journal\":{\"name\":\"2011 Proceedings of the ESSCIRC (ESSCIRC)\",\"volume\":\"122 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-10-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 Proceedings of the ESSCIRC (ESSCIRC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.2011.6044954\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 Proceedings of the ESSCIRC (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2011.6044954","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An aging suppression and calibration approach for differential amplifiers in advanced CMOS technologies
Stress experiments are presented on analog size devices in inversion and accumulation mode, including relaxing stress phenomena. Based on these data, a general concept to suppress device aging impact on differential amplifier circuits in advanced CMOS technologies is presented and proven experimentally. It is shown that the proposed method also enables to compensate for process variation induced mismatch. Thus it provides analog circuit designers the opportunity to reduce matching related area requirements.