A. Motohara, Motohide Murakami, Miki Urano, Yasuo Masuda, Masahide Sugano
{"title":"一种快速分层故障仿真方法","authors":"A. Motohara, Motohide Murakami, Miki Urano, Yasuo Masuda, Masahide Sugano","doi":"10.1109/DAC.1988.14845","DOIUrl":null,"url":null,"abstract":"The authors present an approach to hierarchical fault simulation which generates several simulation models of one circuit and carries out simulation for each. Fault insertion and simulation-model generation is done automatically. Switch-level simulation which utilizes lookup tables is as fast as gate-level simulation. Experimental results show that using behavioral description and switch-level truth tables is effective in improving simulation speed.<<ETX>>","PeriodicalId":230716,"journal":{"name":"25th ACM/IEEE, Design Automation Conference.Proceedings 1988.","volume":"110 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1988-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"An approach to fast hierarchical fault simulation\",\"authors\":\"A. Motohara, Motohide Murakami, Miki Urano, Yasuo Masuda, Masahide Sugano\",\"doi\":\"10.1109/DAC.1988.14845\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The authors present an approach to hierarchical fault simulation which generates several simulation models of one circuit and carries out simulation for each. Fault insertion and simulation-model generation is done automatically. Switch-level simulation which utilizes lookup tables is as fast as gate-level simulation. Experimental results show that using behavioral description and switch-level truth tables is effective in improving simulation speed.<<ETX>>\",\"PeriodicalId\":230716,\"journal\":{\"name\":\"25th ACM/IEEE, Design Automation Conference.Proceedings 1988.\",\"volume\":\"110 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1988-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"25th ACM/IEEE, Design Automation Conference.Proceedings 1988.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DAC.1988.14845\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"25th ACM/IEEE, Design Automation Conference.Proceedings 1988.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DAC.1988.14845","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The authors present an approach to hierarchical fault simulation which generates several simulation models of one circuit and carries out simulation for each. Fault insertion and simulation-model generation is done automatically. Switch-level simulation which utilizes lookup tables is as fast as gate-level simulation. Experimental results show that using behavioral description and switch-level truth tables is effective in improving simulation speed.<>
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