{"title":"卷积运算在通用处理器上的实现","authors":"E. Jamro, K. Wiatr","doi":"10.1109/EURMIC.2001.952482","DOIUrl":null,"url":null,"abstract":"Convolution (FIR filtering) is a computationally demanding operation, especially when performed as a two-dimension (2D) operation in a real time image processing system. Consequently, a great amount of research has been done to perform this operation more and more efficiently. This paper reviews different architectures of general-purpose processors giving the example of Pentium family. In recent years a rapid development of microprocessors have been observed, however, it can be seen that architecture of microprocessors is already complex and a further rapid increase of the calculation speed rather limited. Dedicated processors implement convolution operation very efficiently, nevertheless, the design is not flexible which makes design development, test and upgrade difficult.","PeriodicalId":196541,"journal":{"name":"Proceedings 27th EUROMICRO Conference. 2001: A Net Odyssey","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-09-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"Implementation of convolution operation on general purpose processors\",\"authors\":\"E. Jamro, K. Wiatr\",\"doi\":\"10.1109/EURMIC.2001.952482\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Convolution (FIR filtering) is a computationally demanding operation, especially when performed as a two-dimension (2D) operation in a real time image processing system. Consequently, a great amount of research has been done to perform this operation more and more efficiently. This paper reviews different architectures of general-purpose processors giving the example of Pentium family. In recent years a rapid development of microprocessors have been observed, however, it can be seen that architecture of microprocessors is already complex and a further rapid increase of the calculation speed rather limited. Dedicated processors implement convolution operation very efficiently, nevertheless, the design is not flexible which makes design development, test and upgrade difficult.\",\"PeriodicalId\":196541,\"journal\":{\"name\":\"Proceedings 27th EUROMICRO Conference. 2001: A Net Odyssey\",\"volume\":\"33 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-09-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings 27th EUROMICRO Conference. 2001: A Net Odyssey\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EURMIC.2001.952482\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 27th EUROMICRO Conference. 2001: A Net Odyssey","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EURMIC.2001.952482","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Implementation of convolution operation on general purpose processors
Convolution (FIR filtering) is a computationally demanding operation, especially when performed as a two-dimension (2D) operation in a real time image processing system. Consequently, a great amount of research has been done to perform this operation more and more efficiently. This paper reviews different architectures of general-purpose processors giving the example of Pentium family. In recent years a rapid development of microprocessors have been observed, however, it can be seen that architecture of microprocessors is already complex and a further rapid increase of the calculation speed rather limited. Dedicated processors implement convolution operation very efficiently, nevertheless, the design is not flexible which makes design development, test and upgrade difficult.