The whys and hows of thermal management

As the computational capabilities of integrated systems grow, they become increasingly power-hungry. This dissipated power is converted to heat that must be removed from the system, and a failure to do so can result in excessive temperatures. The trends for thermal problems are severe enough along the Moore's law curve, but become even worse with the advent of 3D ICs, where the power density per unit footprint increases. Therefore, in future systems, it is a virtual certainty that thermal bottlenecks will gain centerstage, and the problem of thermal management must be tackled aggressively at all levels of design. At the chip level, the focus of thermally-aware design has moved from merely package-level considerations to include on-chip thermal management. Thermal variations during the operation of a circuit can result in changes or unpredictability in its performance and reliability. It is essential to solve the problem of thermally-aware design at all levels, developing techniques that range from presilicon analysis and optimization to postsilicon mitigation, taking into account all of the effects associated with elevated temperatures. This talk will provide an overview of challenges and opportunities in this domain.