使用约翰逊编码的可重构fifo的基于vfi的高效NoC架构

A. Rahmani, P. Liljeberg, J. Plosila, H. Tenhunen
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引用次数: 5

摘要

本文提出了一种约翰逊编码的可重构同步/双同步(RSBS) FIFO,该FIFO可以适应同步或双同步模式。所提出的FIFO可用于基于电压/频率岛(VFI)的片上网络接口模块,能够减轻传统双同步FIFO的过度能耗和高性能开销。FIFO是可扩展的,可在同步标准单元中合成。此外,还提出了一种FIFO的中同步自适应技术。我们的大量实验表明,与不可重构架构相比,功耗和性能有了显著提高。
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An efficient VFI-based NoC architecture using Johnson-encoded Reconfigurable FIFOs
In this paper, a Johnson-encoded Reconfigurable Synchronous/Bi-Synchronous (RSBS) FIFO is proposed which can adapt its operation to either synchronous or bi-synchronous mode. The proposed FIFO which can be used to interface modules in Voltage/Frequency Islands (VFI) based Networks-on-chip, is capable of alleviating the excessive energy consumption and high performance overhead of the conventional bi-synchronous FIFOs. The FIFO is scalable and synthesizable in synchronous standard cells. In addition, a technique for mesochronous adaptation of the proposed FIFO is presented. Our extensive experiments show significant power and performance improvements compared to non-reconfigurable architectures.
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