{"title":"复杂低功耗设计的实用DFT方法","authors":"A. Kifli, Y. W. Chen, Yu-Wen Tsai, Kun-Cheng Wu","doi":"10.1109/ATS.2009.61","DOIUrl":null,"url":null,"abstract":"Low power designs create new challenges in design implementation, verification and testing. DFT practice that overlooks test power may result in yield loss/overkill during manufacturing test. This paper addresses the practical problems often encountered during DFT implementation and manufacturing test for complex low power designs.","PeriodicalId":106283,"journal":{"name":"2009 Asian Test Symposium","volume":"262 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A Practical DFT Approach for Complex Low Power Designs\",\"authors\":\"A. Kifli, Y. W. Chen, Yu-Wen Tsai, Kun-Cheng Wu\",\"doi\":\"10.1109/ATS.2009.61\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Low power designs create new challenges in design implementation, verification and testing. DFT practice that overlooks test power may result in yield loss/overkill during manufacturing test. This paper addresses the practical problems often encountered during DFT implementation and manufacturing test for complex low power designs.\",\"PeriodicalId\":106283,\"journal\":{\"name\":\"2009 Asian Test Symposium\",\"volume\":\"262 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-11-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 Asian Test Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ATS.2009.61\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 Asian Test Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.2009.61","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Practical DFT Approach for Complex Low Power Designs
Low power designs create new challenges in design implementation, verification and testing. DFT practice that overlooks test power may result in yield loss/overkill during manufacturing test. This paper addresses the practical problems often encountered during DFT implementation and manufacturing test for complex low power designs.
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