Jin-Chuan See, Jing-Jing Chang, Hui-Fuang Ng, K. Mok, Wai-Kong Lee
{"title":"Design and Implementation of Deep Learning Core for FPGA Platform","authors":"Jin-Chuan See, Jing-Jing Chang, Hui-Fuang Ng, K. Mok, Wai-Kong Lee","doi":"10.1109/ICCOINS49721.2021.9497159","DOIUrl":null,"url":null,"abstract":"As Internet of Things (IoT) continues to advance, the gap between IoT and Artificial Intelligence (AI) is getting smaller. IoT sensor node with \"smart\" capability has become a highly demanded infrastructure to realize Industrial 4.0. Typically, deep learning algorithms are implemented in Graphic Processing Unit (GPU) for high performance. But when it comes to adoption in IoT environment, integrating sensor node with a GPU may pose a major challenge due to high energy consumption. This paper discusses the basic idea on how to implement a deep learning core, specifically for Convolutional Neural Network (CNN) onto the Field Programmable Gate Array (FPGA). Optimization was proposed to reduce number of multiplications needed to address memory contents, hence reducing Digital Signal Processing (DSP) unit synthesized. Synthesis result shows a relatively low hardware area with reasonable performance on both Artix-7 and Virtex-7 FPGA.","PeriodicalId":245662,"journal":{"name":"2021 International Conference on Computer & Information Sciences (ICCOINS)","volume":"124 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-07-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 International Conference on Computer & Information Sciences (ICCOINS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCOINS49721.2021.9497159","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design and Implementation of Deep Learning Core for FPGA Platform
As Internet of Things (IoT) continues to advance, the gap between IoT and Artificial Intelligence (AI) is getting smaller. IoT sensor node with "smart" capability has become a highly demanded infrastructure to realize Industrial 4.0. Typically, deep learning algorithms are implemented in Graphic Processing Unit (GPU) for high performance. But when it comes to adoption in IoT environment, integrating sensor node with a GPU may pose a major challenge due to high energy consumption. This paper discusses the basic idea on how to implement a deep learning core, specifically for Convolutional Neural Network (CNN) onto the Field Programmable Gate Array (FPGA). Optimization was proposed to reduce number of multiplications needed to address memory contents, hence reducing Digital Signal Processing (DSP) unit synthesized. Synthesis result shows a relatively low hardware area with reasonable performance on both Artix-7 and Virtex-7 FPGA.