A microsequencer architecture with firmware support for modular microprogramming

The aim of this paper is to propose a microsequencer architecture and supporting firmware that are suitable for implementing modular microprogramming. The structure consists of a PLA sequencer store, a microcode store (memory) and an address processor. The latter, operating under sequencing commands issued by the PLA, generates the effective address for both stores. The supporting firmware primitives or transactions, stored in PLA, are suitable for structured microprogramming constructs, e.g., while-do, if-then-else, etc. This capability is extended to complex sequencing structures which are then implemented by context-free transaction blocks. Such sequencing is required to achieve migration of complicated. software functions, such as operating systems, in firmware. It is expected that the proposed method is compatible with LSI/VLSI array technology.