MORP:具有嵌入式可重构结构的处理器的最大寿命优化

Artjom Grudnitsky, L. Bauer, J. Henkel
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引用次数: 3

摘要

具有嵌入式运行时可重构结构的处理器已经在学术界进行了探索,并且工业界已经开始生产商业平台(例如Xilinx Zynq-7000)。虽然提供了显著的性能和效率,但是当应用程序频繁请求重新配置时,相对较长的重新配置时间限制了这些优势。在多任务系统中,频繁的任务切换导致频繁的重新配置,从而成为进一步提高性能的主要障碍。复杂的任务调度是减少这些重新配置请求的负面影响的一种非常有效的手段。在本文中,我们提出了一种在线的组合任务调度和可重构结构在任务之间的重新分配方法,以减少makespan,即在运行时可重构处理器上执行的任务集的完成时间。评估由多媒体应用程序组成的多个任务集,我们提出的方法实现的完工时间平均仅比假设零开销重新配置时间的理论最优调度实现的完工时间差2.8%。相比之下,部署在最先进的可重构处理器上的调度方法的makespans比最优值低14%-20%。由于我们的方法是一种纯粹的软件端机制,许多针对多任务的可重构平台都可以从中受益。
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MORP: makespan optimization for processors with an embedded reconfigurable fabric
Processors with an embedded runtime reconfigurable fabric have been explored in academia and industry started production of commercial platforms (e.g. Xilinx Zynq-7000). While providing significant performance and efficiency, the comparatively long reconfiguration time limits these advantages when applications request reconfigurations frequently. In multi-tasking systems frequent task switches lead to frequent reconfigurations and thus are a major hurdle for further performance increases. Sophisticated task scheduling is a very effective means to reduce the negative impact of these reconfiguration requests. In this paper, we propose an online approach for combined task scheduling and re-distribution of reconfigurable fabric between tasks in order to reduce the makespan, i.e. the completion time of a taskset that executes on a runtime reconfigurable processor. Evaluating multiple tasksets comprised of multimedia applications, our proposed approach achieves makespans that are on average only 2.8% worse than those achieved by a theoretical optimal scheduling that assumes zero-overhead reconfiguration time. In comparison, scheduling approaches deployed in state-of-the-art reconfigurable processors achieve makespans 14%-20% worse than optimal. As our approach is a purely software-side mechanism, a multitude of reconfigurable platforms aimed at multi-tasking can benefit from it.
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Energy-efficient multiplier-less discrete convolver through probabilistic domain transformation Revisiting and-inverter cones Pushing the performance boundary of linear projection designs through device specific optimisations (abstract only) MORP: makespan optimization for processors with an embedded reconfigurable fabric Co-processing with dynamic reconfiguration on heterogeneous MPSoC: practices and design tradeoffs (abstract only)
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