Burak Tufekci, Bugra Onal, Hamza Dere, H. F. Ugurdag
{"title":"三相电机驱动场定向控制的硬件实现","authors":"Burak Tufekci, Bugra Onal, Hamza Dere, H. F. Ugurdag","doi":"10.1109/SIU49456.2020.9302445","DOIUrl":null,"url":null,"abstract":"—This paper presents a high switching frequency FPGA implementation of Maximum Torque Per Ampere (MTPA) and Flux Weakening which are branch of Field Oriented Control (FOC) method for 3-phase machine drives. A common architec-ture has been constructed for both BrushLess DC motors (BLDC) and Permanent Magnet Synchronous Motors (PMSM). For this purpose, the controller module was implemented using Space Vector Modulation (SVM) technique. The user interface module was designed to provide real-time torque-time, speed-time, and current-time plots for the user. This interface runs on the PS part of the FPGA and interacts with the user through a UART. The entire system has been verified through simulation.","PeriodicalId":312627,"journal":{"name":"2020 28th Signal Processing and Communications Applications Conference (SIU)","volume":"102 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Hardware Implementation of Field Oriented Control for Three Phase Machine Drives\",\"authors\":\"Burak Tufekci, Bugra Onal, Hamza Dere, H. F. Ugurdag\",\"doi\":\"10.1109/SIU49456.2020.9302445\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"—This paper presents a high switching frequency FPGA implementation of Maximum Torque Per Ampere (MTPA) and Flux Weakening which are branch of Field Oriented Control (FOC) method for 3-phase machine drives. A common architec-ture has been constructed for both BrushLess DC motors (BLDC) and Permanent Magnet Synchronous Motors (PMSM). For this purpose, the controller module was implemented using Space Vector Modulation (SVM) technique. The user interface module was designed to provide real-time torque-time, speed-time, and current-time plots for the user. This interface runs on the PS part of the FPGA and interacts with the user through a UART. The entire system has been verified through simulation.\",\"PeriodicalId\":312627,\"journal\":{\"name\":\"2020 28th Signal Processing and Communications Applications Conference (SIU)\",\"volume\":\"102 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-10-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 28th Signal Processing and Communications Applications Conference (SIU)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SIU49456.2020.9302445\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 28th Signal Processing and Communications Applications Conference (SIU)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIU49456.2020.9302445","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Hardware Implementation of Field Oriented Control for Three Phase Machine Drives
—This paper presents a high switching frequency FPGA implementation of Maximum Torque Per Ampere (MTPA) and Flux Weakening which are branch of Field Oriented Control (FOC) method for 3-phase machine drives. A common architec-ture has been constructed for both BrushLess DC motors (BLDC) and Permanent Magnet Synchronous Motors (PMSM). For this purpose, the controller module was implemented using Space Vector Modulation (SVM) technique. The user interface module was designed to provide real-time torque-time, speed-time, and current-time plots for the user. This interface runs on the PS part of the FPGA and interacts with the user through a UART. The entire system has been verified through simulation.