An energy-efficient hybrid (CMOS-MTJ) TCAM using stochastic writes for approximate computing

We propose a novel writing scheme for hybrid CMOSMTJ TCAM cells to achieve low write energy for approximate computing applications, by exploiting the noise tolerant behavior of such computational paradigms. We show that by exploiting stochastic MTJ switching TCAM cell write energy and latency can be improved. In particular, for an n-bit TCAM, used for approximate computing application, the least significant bits (LSBs) can be operated with weak stochastic write conditions without a significant drop on match accuracy. Distance match accuracy for a 3-bit (LSB), 4T-2MTJ TCAM, designed using 90 nm CMOS technology node and 57 nm (diameter) perpendicular magnetic anisotropic (PMA) MTJ devices was investigated. Using a write probability of 0.97, the overall write energy per LSB was decreased by a factor of 2.3 x, while keeping the cell write latency 7 ns. Impact of MTJ device variability on TCAM cell parameters such as search noise margin (NM) was also analyzed.