Yo‐Sheng Lin, Tien-Hung Chang, Chang‐Zhi Chen, Chi-Chen Chen, H. Yang, S. Wong
{"title":"用于60ghz双转换接收机的低功耗48ghz CMOS VCO和60ghz CMOS LNA","authors":"Yo‐Sheng Lin, Tien-Hung Chang, Chang‐Zhi Chen, Chi-Chen Chen, H. Yang, S. Wong","doi":"10.1109/VDAT.2009.5158102","DOIUrl":null,"url":null,"abstract":"A low-power low-phase-noise 48-GHz CMOS LC voltage-control oscillator (VCO) and a low-power 60-GHz CMOS low-noise amplifier (LNA) for 60-GHz dual-conversion receiver are reported. The VCO dissipated 5.556 mW power, and achieved state-of-the-art phase noise of −105 dBc/Hz at 1-MHz offset from 47.84 GHz. The corresponding figure-of-merit (FOM) was −191.1 dBc/Hz, which is better than those of the reported CMOS LC VCOs around 48 GHz in the literature. Besides, the LNA consumed 21.4 mW power, and achieved input return loss (S<inf>11</inf>) of −10.6∼ −37.4 dB, voltage gain (A<inf>V</inf>) of 10.7∼ 18.8 dB, reverse isolation (S<inf>12</inf>) of −43.5∼ −48.1 dB, input referred 1-dB compression point (P<inf>1dB-in</inf>) of −16.2∼ −20.8 dBm, and input third-order inter-modulation point (IIP3) of −4∼ −7.5 dBm over the 57-64-GHz-band of interest.","PeriodicalId":246670,"journal":{"name":"2009 International Symposium on VLSI Design, Automation and Test","volume":"352 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Low-power 48-GHz CMOS VCO and 60-GHz CMOS LNA for 60-GHz dual-conversion receiver\",\"authors\":\"Yo‐Sheng Lin, Tien-Hung Chang, Chang‐Zhi Chen, Chi-Chen Chen, H. Yang, S. Wong\",\"doi\":\"10.1109/VDAT.2009.5158102\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A low-power low-phase-noise 48-GHz CMOS LC voltage-control oscillator (VCO) and a low-power 60-GHz CMOS low-noise amplifier (LNA) for 60-GHz dual-conversion receiver are reported. The VCO dissipated 5.556 mW power, and achieved state-of-the-art phase noise of −105 dBc/Hz at 1-MHz offset from 47.84 GHz. The corresponding figure-of-merit (FOM) was −191.1 dBc/Hz, which is better than those of the reported CMOS LC VCOs around 48 GHz in the literature. Besides, the LNA consumed 21.4 mW power, and achieved input return loss (S<inf>11</inf>) of −10.6∼ −37.4 dB, voltage gain (A<inf>V</inf>) of 10.7∼ 18.8 dB, reverse isolation (S<inf>12</inf>) of −43.5∼ −48.1 dB, input referred 1-dB compression point (P<inf>1dB-in</inf>) of −16.2∼ −20.8 dBm, and input third-order inter-modulation point (IIP3) of −4∼ −7.5 dBm over the 57-64-GHz-band of interest.\",\"PeriodicalId\":246670,\"journal\":{\"name\":\"2009 International Symposium on VLSI Design, Automation and Test\",\"volume\":\"352 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-04-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 International Symposium on VLSI Design, Automation and Test\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VDAT.2009.5158102\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Symposium on VLSI Design, Automation and Test","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VDAT.2009.5158102","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Low-power 48-GHz CMOS VCO and 60-GHz CMOS LNA for 60-GHz dual-conversion receiver
A low-power low-phase-noise 48-GHz CMOS LC voltage-control oscillator (VCO) and a low-power 60-GHz CMOS low-noise amplifier (LNA) for 60-GHz dual-conversion receiver are reported. The VCO dissipated 5.556 mW power, and achieved state-of-the-art phase noise of −105 dBc/Hz at 1-MHz offset from 47.84 GHz. The corresponding figure-of-merit (FOM) was −191.1 dBc/Hz, which is better than those of the reported CMOS LC VCOs around 48 GHz in the literature. Besides, the LNA consumed 21.4 mW power, and achieved input return loss (S11) of −10.6∼ −37.4 dB, voltage gain (AV) of 10.7∼ 18.8 dB, reverse isolation (S12) of −43.5∼ −48.1 dB, input referred 1-dB compression point (P1dB-in) of −16.2∼ −20.8 dBm, and input third-order inter-modulation point (IIP3) of −4∼ −7.5 dBm over the 57-64-GHz-band of interest.