D. Vaithiyanathan, M. B. Raj, S. Pushpa, R. Seetharaman
{"title":"FET和负电容FET在6T SRAM上的性能分析","authors":"D. Vaithiyanathan, M. B. Raj, S. Pushpa, R. Seetharaman","doi":"10.1109/ICCS1.2017.8325989","DOIUrl":null,"url":null,"abstract":"The need for high performance system has pushed the limits of Moore's law to extend for future decades. This caused the evolution of compact transistors and produced the ultra scale thin film transistor called FinFET. Although the fully depleted SOI transistor (FD-SOI seems to be promising factor, FinFET replaced it for its resistance to short channel effects. The technological advancement further seeks a low power design and urges the core material to operate at its extreme low threshold point. This paper records various short channel effects such as SS, DIBL, threshold voltage of FinFET and NCFET stacked SRAM device in terms of delay, leakage power and signal to noise margin(SNM).","PeriodicalId":367360,"journal":{"name":"2017 IEEE International Conference on Circuits and Systems (ICCS)","volume":"22 6S 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Performance analysis of FinFET and negative capacitance FET over 6T SRAM\",\"authors\":\"D. Vaithiyanathan, M. B. Raj, S. Pushpa, R. Seetharaman\",\"doi\":\"10.1109/ICCS1.2017.8325989\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The need for high performance system has pushed the limits of Moore's law to extend for future decades. This caused the evolution of compact transistors and produced the ultra scale thin film transistor called FinFET. Although the fully depleted SOI transistor (FD-SOI seems to be promising factor, FinFET replaced it for its resistance to short channel effects. The technological advancement further seeks a low power design and urges the core material to operate at its extreme low threshold point. This paper records various short channel effects such as SS, DIBL, threshold voltage of FinFET and NCFET stacked SRAM device in terms of delay, leakage power and signal to noise margin(SNM).\",\"PeriodicalId\":367360,\"journal\":{\"name\":\"2017 IEEE International Conference on Circuits and Systems (ICCS)\",\"volume\":\"22 6S 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE International Conference on Circuits and Systems (ICCS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCS1.2017.8325989\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE International Conference on Circuits and Systems (ICCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCS1.2017.8325989","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Performance analysis of FinFET and negative capacitance FET over 6T SRAM
The need for high performance system has pushed the limits of Moore's law to extend for future decades. This caused the evolution of compact transistors and produced the ultra scale thin film transistor called FinFET. Although the fully depleted SOI transistor (FD-SOI seems to be promising factor, FinFET replaced it for its resistance to short channel effects. The technological advancement further seeks a low power design and urges the core material to operate at its extreme low threshold point. This paper records various short channel effects such as SS, DIBL, threshold voltage of FinFET and NCFET stacked SRAM device in terms of delay, leakage power and signal to noise margin(SNM).