H. Furukawa, T. Fukui, T. Tanaka, A. Noma, D. Ueda
{"title":"一种新型的GaAs功率场效应管表面通孔制备工艺","authors":"H. Furukawa, T. Fukui, T. Tanaka, A. Noma, D. Ueda","doi":"10.1109/GAAS.1998.722690","DOIUrl":null,"url":null,"abstract":"A simple new fabrication process of via-holes has been developed for GaAs power FETs. This process features deep trench etching from the wafer surface followed by refilling the trench by conformal electro-plating. The Surface Via-Hole (SVH) is engraved by extremely high rate ECR etching. We obtained the etching rate of over 4 /spl mu/m/min with a completely anisotropic smooth profile. The conformal metal deposition around the trench is achieved by pulse-modulated electro-plating. The GaAs power FET with SVH showed better linearity than the conventional wire-bonded one. The present SVH process is applicable to almost all the GaAs FETs or MMICs with very small area consumption and suitable for the high volume production.","PeriodicalId":288170,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 20th Annual. Technical Digest 1998 (Cat. No.98CH36260)","volume":"241 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":"{\"title\":\"A novel fabrication process of surface via-holes for GaAs power FETs\",\"authors\":\"H. Furukawa, T. Fukui, T. Tanaka, A. Noma, D. Ueda\",\"doi\":\"10.1109/GAAS.1998.722690\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A simple new fabrication process of via-holes has been developed for GaAs power FETs. This process features deep trench etching from the wafer surface followed by refilling the trench by conformal electro-plating. The Surface Via-Hole (SVH) is engraved by extremely high rate ECR etching. We obtained the etching rate of over 4 /spl mu/m/min with a completely anisotropic smooth profile. The conformal metal deposition around the trench is achieved by pulse-modulated electro-plating. The GaAs power FET with SVH showed better linearity than the conventional wire-bonded one. The present SVH process is applicable to almost all the GaAs FETs or MMICs with very small area consumption and suitable for the high volume production.\",\"PeriodicalId\":288170,\"journal\":{\"name\":\"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 20th Annual. Technical Digest 1998 (Cat. No.98CH36260)\",\"volume\":\"241 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"16\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 20th Annual. Technical Digest 1998 (Cat. No.98CH36260)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/GAAS.1998.722690\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 20th Annual. Technical Digest 1998 (Cat. No.98CH36260)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GAAS.1998.722690","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A novel fabrication process of surface via-holes for GaAs power FETs
A simple new fabrication process of via-holes has been developed for GaAs power FETs. This process features deep trench etching from the wafer surface followed by refilling the trench by conformal electro-plating. The Surface Via-Hole (SVH) is engraved by extremely high rate ECR etching. We obtained the etching rate of over 4 /spl mu/m/min with a completely anisotropic smooth profile. The conformal metal deposition around the trench is achieved by pulse-modulated electro-plating. The GaAs power FET with SVH showed better linearity than the conventional wire-bonded one. The present SVH process is applicable to almost all the GaAs FETs or MMICs with very small area consumption and suitable for the high volume production.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
