微架构特征作为嵌入式安全关键系统中的软错误标记:初步研究

Deniz Kasap, Alessio Carpegna, A. Savino, S. Carlo
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引用次数: 0

摘要

辐射引起的软误差是安全关键实时嵌入式系统(SACRES)可靠性中最具挑战性的问题之一,通常使用不同风格的双模块冗余(DMR)技术来处理。由于现代微处理器在所有领域的复杂性,这种解决方案正变得难以承受。本文讨论了使用基于人工智能(AI)的硬件检测器检测软错误的前景。为了创建这样的核心,并使它们足够通用,可以与不同的软件应用程序一起工作,微体系结构属性作为候选故障检测特性是一个很好的选择。一些处理器已经通过专用的性能监控单元(PMU)跟踪这些特性。然而,在多大程度上它们足以发现错误的执行,这是一个悬而未决的问题。利用gem5的能力来模拟真实的计算系统,执行故障注入实验,以及描述微架构属性(即gem5 Stats),本文给出了关于检测软错误的潜在属性的综合分析结果,以及可以用这些特征训练的相关模型。
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Micro-Architectural features as soft-error markers in embedded safety-critical systems: preliminary study
Radiation-induced soft errors are one of the most challenging issues in Safety Critical Real-Time Embedded System (SACRES) reliability, usually handled using different flavors of Double Modular Redundancy (DMR) techniques. This solution is becoming unaffordable due to the complexity of modern micro-processors in all domains. This paper addresses the promising field of using Artificial Intelligence (AI) based hardware detectors for soft errors. To create such cores and make them general enough to work with different software applications, micro-architectural attributes are a fascinating option as candidate fault detection features. Several processors already track these features through dedicated Performance Monitoring Unit (PMU). However, there is an open question to understand to what extent they are enough to detect faulty executions. Exploiting the capability of gem5 to simulate real computing systems, perform fault injection experiments, and profile micro-architectural attributes (i.e., gem5 Stats), this paper presents the results of a comprehensive analysis regarding the potential attributes to detect soft errors and the associated models that can be trained with these features.
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