A Nano-Power Self-Clocked D-LDO for RF Energy Harvesting

Digital Low Drop-Out regulators, in contrast to analog counterparts, provide an architecture of sub-1 V regulation with low power consumption, high power efficiency, and system integration. Towards an optimized integration in the ultra-low-power System-On-Chip Internet of Things architecture that is operated through Radio Frequency energy harvesting scheme, the D-LDO regulator should constitute the main regulator that powers the master-clock and rest loads of the SoC. In this context, this work presents a self-clocked D-LDO design dedicated for wireless power transfer and harvesting applications such as RFID with nano-power consumption and 0.5 V operational voltage, fabricated at a 55-nm Global Foundries CMOS process. With the purpose to validate the self-start-up capability of the presented D-LDO in the presence of ultra-low input power, a test-bench with a RF rectifier is implemented that provides the RF to DC operation and feeds the D-LDO. Power efficiency and load regulation curves of the D-LDO are presented as extracted from the RF to DC operation. It presents 386 nA minimum quiescent current, 83.6 % power efficiency during the RF to DC operation with $3.65\mu$ A load current and regulator referred input power of -27 dB m.