{"title":"基于性能水平主成分分析的现实最坏情况建模","authors":"A. Nardi, A. Neviani, C. Guardiani","doi":"10.1109/ISQED.2000.838920","DOIUrl":null,"url":null,"abstract":"A new algorithm to determine the number and value of realistic worst-case models for the performance of module library components is presented in this paper. The proposed algorithm employs principal components analysis (PCA) at the performance level to identify the main independent sources of variance for the performance of a set of library modules. Response surfaces methodology (RSM) and propagation of variance (POV) based algorithms are used to efficiently compute the performance level covariance matrix and nonlinear maximum likelihood optimization to trace back worst case models at the SPICE level. The effectiveness of the proposed methodology has been demonstrated by determining a realistic set of worst case models for a 0.25 /spl mu/m CMOS standard cell library.","PeriodicalId":113766,"journal":{"name":"Proceedings IEEE 2000 First International Symposium on Quality Electronic Design (Cat. No. PR00525)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Realistic worst-case modeling by performance level principal component analysis\",\"authors\":\"A. Nardi, A. Neviani, C. Guardiani\",\"doi\":\"10.1109/ISQED.2000.838920\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new algorithm to determine the number and value of realistic worst-case models for the performance of module library components is presented in this paper. The proposed algorithm employs principal components analysis (PCA) at the performance level to identify the main independent sources of variance for the performance of a set of library modules. Response surfaces methodology (RSM) and propagation of variance (POV) based algorithms are used to efficiently compute the performance level covariance matrix and nonlinear maximum likelihood optimization to trace back worst case models at the SPICE level. The effectiveness of the proposed methodology has been demonstrated by determining a realistic set of worst case models for a 0.25 /spl mu/m CMOS standard cell library.\",\"PeriodicalId\":113766,\"journal\":{\"name\":\"Proceedings IEEE 2000 First International Symposium on Quality Electronic Design (Cat. No. PR00525)\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-03-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings IEEE 2000 First International Symposium on Quality Electronic Design (Cat. No. PR00525)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISQED.2000.838920\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings IEEE 2000 First International Symposium on Quality Electronic Design (Cat. No. PR00525)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED.2000.838920","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Realistic worst-case modeling by performance level principal component analysis
A new algorithm to determine the number and value of realistic worst-case models for the performance of module library components is presented in this paper. The proposed algorithm employs principal components analysis (PCA) at the performance level to identify the main independent sources of variance for the performance of a set of library modules. Response surfaces methodology (RSM) and propagation of variance (POV) based algorithms are used to efficiently compute the performance level covariance matrix and nonlinear maximum likelihood optimization to trace back worst case models at the SPICE level. The effectiveness of the proposed methodology has been demonstrated by determining a realistic set of worst case models for a 0.25 /spl mu/m CMOS standard cell library.