HDI pcb上PCI-Express Gen 3 SerDes通道的阻抗透明设计

2014 IEEE International Symposium on Electromagnetic Compatibility (EMC) Pub Date : 2014-11-20 DOI:10.1109/ISEMC.2014.6899047

Jue Chen, Bidyut Sen

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摘要

本文从交流耦合电容和过渡通孔两个方面讨论了PCI Express第3代背板通道的阻抗透明性设计。仿真结果表明，优化的交流耦合电容接地间隙和优化的过渡过孔有助于提高通道阻抗透明度。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Impedance transparency design for PCI-Express Gen 3 SerDes channel on HDI PCBs

AC-coupling capacitor and transition via are the two areas discussed in this paper for the impedance transparency design of a PCI Express Gen 3 backplane channel. The simulation results show that the optimized ground gap for the AC-coupling capacitors and the optimized transition vias helps improve the channel impedance transparency.

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2014 IEEE International Symposium on Electromagnetic Compatibility (EMC)

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