低功耗毫米波和射频平台的65nm SOI CMOS SoC技术

2008 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems Pub Date : 2008-02-01 DOI:10.1109/SMIC.2008.18

Daeik D. Kim, Jonghae Kim, Choongyeun Cho, J. Plouchart, R. Trzcinski

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引用次数: 2

摘要

提出了一种基于65nm SOI CMOS技术的射频和毫米波平台。在有线单元中测量的SOI FET性能最高可达fT=300 GHz和200 GHz，用于FET和FET。环形振荡器记录3.6 psec最小逆变级延迟。报告了后端垂直原生电容(VNCAP)和片上电感的性能。介绍了毫米波锁相环前端器件的性能扩展趋势。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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65nm SOI CMOS SoC Technology for Low-Power mmWave and RF Platform

An RF and mm-wave platform developed in 65 nm SOI CMOS technology is presented. The SOI FET performance in a wired cell is measured up to fT=300 GHz and 200 GHz for NFET and PFET. Ring oscillator records 3.6 psec minimum inverter stage delay. Back-end-of-line vertical native capacitor (VNCAP) and on-chip inductor performances are reported. The performance scaling trends of mmWave PLL front-end components are presented.

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2008 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems

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