LISPARC:使用体系结构描述语言方法对自适应处理器微体系结构进行建模

Carsten Tradowsky, F. Thoma, M. Hübner, J. Becker
{"title":"LISPARC:使用体系结构描述语言方法对自适应处理器微体系结构进行建模","authors":"Carsten Tradowsky, F. Thoma, M. Hübner, J. Becker","doi":"10.1109/SIES.2012.6356596","DOIUrl":null,"url":null,"abstract":"In today's mobile computers, such as tablets and smart phones, power, performance and chip area are the major constraints to the development of cost efficient high tech products. One solution is the usage of application-specific instruction-set processors (ASIP), which are optimized for the execution of special tasks and thus enable a more efficient implementation. As an extension to this approach the LISPARC processor is developed. For more flexibility, the LISPARC model enables dynamic reconfiguration at run-time in order to adapt to different ASIPs. The processor model of LISPARC is described using an architecture description language called Language for Instruction-Set Architectures (LISA).","PeriodicalId":219258,"journal":{"name":"7th IEEE International Symposium on Industrial Embedded Systems (SIES'12)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"LISPARC: Using an architecture description language approach for modelling an adaptive processor microarchitecture\",\"authors\":\"Carsten Tradowsky, F. Thoma, M. Hübner, J. Becker\",\"doi\":\"10.1109/SIES.2012.6356596\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In today's mobile computers, such as tablets and smart phones, power, performance and chip area are the major constraints to the development of cost efficient high tech products. One solution is the usage of application-specific instruction-set processors (ASIP), which are optimized for the execution of special tasks and thus enable a more efficient implementation. As an extension to this approach the LISPARC processor is developed. For more flexibility, the LISPARC model enables dynamic reconfiguration at run-time in order to adapt to different ASIPs. The processor model of LISPARC is described using an architecture description language called Language for Instruction-Set Architectures (LISA).\",\"PeriodicalId\":219258,\"journal\":{\"name\":\"7th IEEE International Symposium on Industrial Embedded Systems (SIES'12)\",\"volume\":\"45 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-06-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"7th IEEE International Symposium on Industrial Embedded Systems (SIES'12)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SIES.2012.6356596\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"7th IEEE International Symposium on Industrial Embedded Systems (SIES'12)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIES.2012.6356596","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6

摘要

在当今的移动计算机中,如平板电脑和智能手机,功率、性能和芯片面积是制约高性价比高科技产品发展的主要因素。一种解决方案是使用特定于应用程序的指令集处理器(ASIP),它针对特殊任务的执行进行了优化,从而实现了更高效的实现。作为这种方法的扩展,开发了LISPARC处理器。为了获得更大的灵活性,LISPARC模型支持在运行时动态重新配置,以适应不同的api。LISPARC的处理器模型使用一种称为指令集体系结构语言(LISA)的体系结构描述语言来描述。
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LISPARC: Using an architecture description language approach for modelling an adaptive processor microarchitecture
In today's mobile computers, such as tablets and smart phones, power, performance and chip area are the major constraints to the development of cost efficient high tech products. One solution is the usage of application-specific instruction-set processors (ASIP), which are optimized for the execution of special tasks and thus enable a more efficient implementation. As an extension to this approach the LISPARC processor is developed. For more flexibility, the LISPARC model enables dynamic reconfiguration at run-time in order to adapt to different ASIPs. The processor model of LISPARC is described using an architecture description language called Language for Instruction-Set Architectures (LISA).
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