Chieh-Pu Lo, Wei-Hao Chen, Zhibo Wang, Albert Lee, Kuo-Hsiang Hsu, Fang Su, Y. King, C. Lin, Yongpan Liu, Huazhong Yang, P. Khalili, Kang L. Wang, Meng-Fan Chang
{"title":"一种基于reram的单nvm非易失性触发器,采用物联网时代非易失性处理器的自写终止方案,减少了写时间和写功率,减少了写时间分布","authors":"Chieh-Pu Lo, Wei-Hao Chen, Zhibo Wang, Albert Lee, Kuo-Hsiang Hsu, Fang Su, Y. King, C. Lin, Yongpan Liu, Huazhong Yang, P. Khalili, Kang L. Wang, Meng-Fan Chang","doi":"10.1109/IEDM.2016.7838430","DOIUrl":null,"url":null,"abstract":"Recent nonvolatile flip-flops (nvFFs) enable the parallel movement of data locally between flip-flops (FFs) and nonvolatile memory (NVM) devices for faster system power off/on operations. The wide distribution and long period in NVM-write times of previous two-NVM-based nvFFs result in excessive store energy (Es) and over-write induced reliability degradation for NVM-write operations. This work proposes an nvFF using a single NVM (1R) with self-write-termination (SWT), capable of reducing ES by 27+x and avoid over-write operations. In fabricated 65nm ReRAM nvProcessor testchips, the proposed SWT1R nvFFs achieved off/on operations with a 99% reduction in Es and 2.7ns SWT latency (TSWT). For the first time, an nvFF with single NVM device is presented.","PeriodicalId":186544,"journal":{"name":"2016 IEEE International Electron Devices Meeting (IEDM)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":"{\"title\":\"A ReRAM-based single-NVM nonvolatile flip-flop with reduced stress-time and write-power against wide distribution in write-time by using self-write-termination scheme for nonvolatile processors in IoT era\",\"authors\":\"Chieh-Pu Lo, Wei-Hao Chen, Zhibo Wang, Albert Lee, Kuo-Hsiang Hsu, Fang Su, Y. King, C. Lin, Yongpan Liu, Huazhong Yang, P. Khalili, Kang L. Wang, Meng-Fan Chang\",\"doi\":\"10.1109/IEDM.2016.7838430\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Recent nonvolatile flip-flops (nvFFs) enable the parallel movement of data locally between flip-flops (FFs) and nonvolatile memory (NVM) devices for faster system power off/on operations. The wide distribution and long period in NVM-write times of previous two-NVM-based nvFFs result in excessive store energy (Es) and over-write induced reliability degradation for NVM-write operations. This work proposes an nvFF using a single NVM (1R) with self-write-termination (SWT), capable of reducing ES by 27+x and avoid over-write operations. In fabricated 65nm ReRAM nvProcessor testchips, the proposed SWT1R nvFFs achieved off/on operations with a 99% reduction in Es and 2.7ns SWT latency (TSWT). For the first time, an nvFF with single NVM device is presented.\",\"PeriodicalId\":186544,\"journal\":{\"name\":\"2016 IEEE International Electron Devices Meeting (IEDM)\",\"volume\":\"20 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"19\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE International Electron Devices Meeting (IEDM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2016.7838430\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE International Electron Devices Meeting (IEDM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2016.7838430","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A ReRAM-based single-NVM nonvolatile flip-flop with reduced stress-time and write-power against wide distribution in write-time by using self-write-termination scheme for nonvolatile processors in IoT era
Recent nonvolatile flip-flops (nvFFs) enable the parallel movement of data locally between flip-flops (FFs) and nonvolatile memory (NVM) devices for faster system power off/on operations. The wide distribution and long period in NVM-write times of previous two-NVM-based nvFFs result in excessive store energy (Es) and over-write induced reliability degradation for NVM-write operations. This work proposes an nvFF using a single NVM (1R) with self-write-termination (SWT), capable of reducing ES by 27+x and avoid over-write operations. In fabricated 65nm ReRAM nvProcessor testchips, the proposed SWT1R nvFFs achieved off/on operations with a 99% reduction in Es and 2.7ns SWT latency (TSWT). For the first time, an nvFF with single NVM device is presented.