Pub Date : 2019-12-17DOI: 10.1109/IEDM.2016.7838409
S. D. Franceschi, L. Hutin, R. Maurand, L. Bourdet, H. Bohuslavskyi, A. Corna, D. Kotekar-Patil, S. Barraud, X. Jehl, Y. Niquet, M. Sanquer, M. Vinet
We present recent progress towards the implementation of a scalable quantum processor based on fully-depleted silicon-on-insulator (FDSOI) technology. In particular, we discuss an approach where the elementary bits of quantum information — so-called qubits — are encoded in the spin degree of freedom of gate-confined holes in p-type devices. We show how a hole-spin can be efficiently manipulated by means of a microwave excitation applied to the corresponding confining gate. The hole spin state can be read out and reinitialized through a Pauli blockade mechanism. The studied devices are derived from silicon nanowire field-effect transistors. We discuss their prospects for scalability and, more broadly, the potential advantages of FDSOI technology.
{"title":"SOI technology for quantum information processing","authors":"S. D. Franceschi, L. Hutin, R. Maurand, L. Bourdet, H. Bohuslavskyi, A. Corna, D. Kotekar-Patil, S. Barraud, X. Jehl, Y. Niquet, M. Sanquer, M. Vinet","doi":"10.1109/IEDM.2016.7838409","DOIUrl":"https://doi.org/10.1109/IEDM.2016.7838409","url":null,"abstract":"We present recent progress towards the implementation of a scalable quantum processor based on fully-depleted silicon-on-insulator (FDSOI) technology. In particular, we discuss an approach where the elementary bits of quantum information — so-called qubits — are encoded in the spin degree of freedom of gate-confined holes in p-type devices. We show how a hole-spin can be efficiently manipulated by means of a microwave excitation applied to the corresponding confining gate. The hole spin state can be read out and reinitialized through a Pauli blockade mechanism. The studied devices are derived from silicon nanowire field-effect transistors. We discuss their prospects for scalability and, more broadly, the potential advantages of FDSOI technology.","PeriodicalId":186544,"journal":{"name":"2016 IEEE International Electron Devices Meeting (IEDM)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129232992","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-12-07DOI: 10.1109/IEDM.2016.7838524
Dong-il Moon, Jun-Y. Park, Jin-woo Han, Gwang-Jae Jeon, Jee-Yeon Kim, John U. Moon, Myeong-Lok Seol, C. Kim, Hee-Chul Lee, M. Meyyappan, Yang‐Kyu Choi
An on-the-fly self-healing device is experimentally demonstrated for sustainability of space electronics. A high temperature, which is generated by Joule heating in a gate electrode, provides an on-chip annealing of damages induced by ionizing radiation, hot carrier, and tunneling stress. With the self-healing process, a highly scaled silicon nanowire gate-all-around field-effect transistor shows improved long-term reliability in a logic transistor, floating body DRAM, and charge-trap Flash memory, respectively. A thermally isolated gate structure is proposed to enhance the self-healing effect.
{"title":"Sustainable electronics for nano-spacecraft in deep space missions","authors":"Dong-il Moon, Jun-Y. Park, Jin-woo Han, Gwang-Jae Jeon, Jee-Yeon Kim, John U. Moon, Myeong-Lok Seol, C. Kim, Hee-Chul Lee, M. Meyyappan, Yang‐Kyu Choi","doi":"10.1109/IEDM.2016.7838524","DOIUrl":"https://doi.org/10.1109/IEDM.2016.7838524","url":null,"abstract":"An on-the-fly self-healing device is experimentally demonstrated for sustainability of space electronics. A high temperature, which is generated by Joule heating in a gate electrode, provides an on-chip annealing of damages induced by ionizing radiation, hot carrier, and tunneling stress. With the self-healing process, a highly scaled silicon nanowire gate-all-around field-effect transistor shows improved long-term reliability in a logic transistor, floating body DRAM, and charge-trap Flash memory, respectively. A thermally isolated gate structure is proposed to enhance the self-healing effect.","PeriodicalId":186544,"journal":{"name":"2016 IEEE International Electron Devices Meeting (IEDM)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131214442","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-12-05DOI: 10.1109/IEDM.2016.7838418
Raphael Clerc, B. Bouthinon, M. Mohankumar, Patrice Rannou, Jérôme Vaillant, T. Maindron, B. Racine, Y.F. Chen, Lionel Hirsch, J. Verilhac, Alexandre Pereira, A. Revaux
Progress in the modeling of charge transport in solution processed solar cells and photodiodes is reviewed. Through several examples involving modeling and original experiments, the role of intentional doping, structural defects, and oxygen contamination are discussed.
{"title":"Current status and challenges of the modeling of organic photodiodes and solar cells","authors":"Raphael Clerc, B. Bouthinon, M. Mohankumar, Patrice Rannou, Jérôme Vaillant, T. Maindron, B. Racine, Y.F. Chen, Lionel Hirsch, J. Verilhac, Alexandre Pereira, A. Revaux","doi":"10.1109/IEDM.2016.7838418","DOIUrl":"https://doi.org/10.1109/IEDM.2016.7838418","url":null,"abstract":"Progress in the modeling of charge transport in solution processed solar cells and photodiodes is reviewed. Through several examples involving modeling and original experiments, the role of intentional doping, structural defects, and oxygen contamination are discussed.","PeriodicalId":186544,"journal":{"name":"2016 IEEE International Electron Devices Meeting (IEDM)","volume":"299 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123466618","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-12-05DOI: 10.1109/IEDM.2016.7838485
Daewon Kim, Weon‐Guk Kim, I. Jin, Hongkeun Park, Moo Jin Kwak, S. Im, Yang-Kyu Choi
A thickness effect of a tribo-dielectric layer (TDL) made of ultra-thin polymer in a triboelectric energy harvester (TEH) is experimentally and comprehensively studied. The TDL was deposited by the initiated chemical vapor deposition (i-CVD) method and its thickness was precisely controlled to analyze the thickness effect. The correlation between the thickness of the TDL and the output performance is experimentally determined and analytically understood with the aid of the dynamic contact-separation model. In contrast to the conventional static contact-separation model, in this case the output performance increases as the thickness of the TDL increases owing to the dynamic behavior of the electron, which includes drift and recombination phenomenon in the TDL.
{"title":"Triboelectric energy harvester with an ultra-thin tribo-dielectric layer by initiated CVD and investigation of underlying physics in the triboelectricity","authors":"Daewon Kim, Weon‐Guk Kim, I. Jin, Hongkeun Park, Moo Jin Kwak, S. Im, Yang-Kyu Choi","doi":"10.1109/IEDM.2016.7838485","DOIUrl":"https://doi.org/10.1109/IEDM.2016.7838485","url":null,"abstract":"A thickness effect of a tribo-dielectric layer (TDL) made of ultra-thin polymer in a triboelectric energy harvester (TEH) is experimentally and comprehensively studied. The TDL was deposited by the initiated chemical vapor deposition (i-CVD) method and its thickness was precisely controlled to analyze the thickness effect. The correlation between the thickness of the TDL and the output performance is experimentally determined and analytically understood with the aid of the dynamic contact-separation model. In contrast to the conventional static contact-separation model, in this case the output performance increases as the thickness of the TDL increases owing to the dynamic behavior of the electron, which includes drift and recombination phenomenon in the TDL.","PeriodicalId":186544,"journal":{"name":"2016 IEEE International Electron Devices Meeting (IEDM)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130000170","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-12-03DOI: 10.1109/IEDM.2016.7838372
T. A. Abbas, N. Dutton, Oscar Almer, S. Pellegrini, Y. Henrion, R. Henderson
We present the first 3D-stacked backside illuminated (BSI) single photon avalanche diode (SPAD) image sensor capable of both single photon counting (SPC) intensity, and time resolved imaging. The 128×120 prototype has a pixel pitch of 7.83 μm making it the smallest pixel reported for SPAD image sensors. A low power, high density 40nm bottom tier hosts the quenching front end and processing electronics while an imaging specific 65nm top tier hosts the photo-detectors with a 1-to-1 hybrid bond connection [1]. The SPAD exhibits a median dark count rate (DCR) below 200cps at room temperature and 1V excess bias, and has a peak photon detection probability (PDP) of 27.5% at 640nm and 3 V excess bias.
{"title":"Backside illuminated SPAD image sensor with 7.83μm pitch in 3D-stacked CMOS technology","authors":"T. A. Abbas, N. Dutton, Oscar Almer, S. Pellegrini, Y. Henrion, R. Henderson","doi":"10.1109/IEDM.2016.7838372","DOIUrl":"https://doi.org/10.1109/IEDM.2016.7838372","url":null,"abstract":"We present the first 3D-stacked backside illuminated (BSI) single photon avalanche diode (SPAD) image sensor capable of both single photon counting (SPC) intensity, and time resolved imaging. The 128×120 prototype has a pixel pitch of 7.83 μm making it the smallest pixel reported for SPAD image sensors. A low power, high density 40nm bottom tier hosts the quenching front end and processing electronics while an imaging specific 65nm top tier hosts the photo-detectors with a 1-to-1 hybrid bond connection [1]. The SPAD exhibits a median dark count rate (DCR) below 200cps at room temperature and 1V excess bias, and has a peak photon detection probability (PDP) of 27.5% at 640nm and 3 V excess bias.","PeriodicalId":186544,"journal":{"name":"2016 IEEE International Electron Devices Meeting (IEDM)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131865703","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-12-03DOI: 10.1109/IEDM.2016.7838373
I. Gyongy, N. Calder, A. Davies, N. Dutton, P. Dalgarno, R. Duncan, C. Rickman, R. Henderson
A 256×256 Single Photon Avalanche Diode (SPAD) image sensor operating at 100kfps with fill factor of 61% and pixel pitch of 16μm is reported. An all-NMOS 7T pixel allows high uniformity gated operation down to 4ns and ∼600ps fall time with on-chip delay generation. The sensor operates with 0.996 temporal aperture ratio (TAR) in rolling shutter and has a parasitic light sensitivity (PLS) in excess of −160dB when operated in global shutter. Gating and cooling allow the suppression of dark noise, which, in combination with the high fill factor, enables competitive low-light performance with electron multiplying CCDs (EMCCDs) whilst offering time-resolved imaging modes.
{"title":"256×256, 100kfps, 61% Fill-factor time-resolved SPAD image sensor for microscopy applications","authors":"I. Gyongy, N. Calder, A. Davies, N. Dutton, P. Dalgarno, R. Duncan, C. Rickman, R. Henderson","doi":"10.1109/IEDM.2016.7838373","DOIUrl":"https://doi.org/10.1109/IEDM.2016.7838373","url":null,"abstract":"A 256×256 Single Photon Avalanche Diode (SPAD) image sensor operating at 100kfps with fill factor of 61% and pixel pitch of 16μm is reported. An all-NMOS 7T pixel allows high uniformity gated operation down to 4ns and ∼600ps fall time with on-chip delay generation. The sensor operates with 0.996 temporal aperture ratio (TAR) in rolling shutter and has a parasitic light sensitivity (PLS) in excess of −160dB when operated in global shutter. Gating and cooling allow the suppression of dark noise, which, in combination with the high fill factor, enables competitive low-light performance with electron multiplying CCDs (EMCCDs) whilst offering time-resolved imaging modes.","PeriodicalId":186544,"journal":{"name":"2016 IEEE International Electron Devices Meeting (IEDM)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125220528","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-12-01DOI: 10.1109/IEDM.2016.7838460
H. Ishida, Ryo Kajitani, Y. Kinoshita, H. Umeda, S. Ujita, M. Ogawa, Kenichiro Tanaka, T. Morita, S. Tamura, M. Ishida, T. Ueda
GaN-based natural superjunction diodes and Gate Injection Transistors (GITs) with p-type gate on AlGaN/GaN hetero structure are promising power devices with lower on-state resistance and higher breakdown voltage for power switching applications. In this paper, the current status of the devices for integrated circuits and their application to power switching systems are reviewed, after explaining the basic technologies for decreasing on-resistance, increasing breakdown voltage, and suppressing current collapse. In addition, a solution to increase switching frequency of GITs for smaller system size is described. The effects of integrated circuit of DC/DC converter consisted of gate driver, high-side GIT and low-side GIT with short gate length are also examined.
{"title":"GaN-based semiconductor devices for future power switching systems","authors":"H. Ishida, Ryo Kajitani, Y. Kinoshita, H. Umeda, S. Ujita, M. Ogawa, Kenichiro Tanaka, T. Morita, S. Tamura, M. Ishida, T. Ueda","doi":"10.1109/IEDM.2016.7838460","DOIUrl":"https://doi.org/10.1109/IEDM.2016.7838460","url":null,"abstract":"GaN-based natural superjunction diodes and Gate Injection Transistors (GITs) with p-type gate on AlGaN/GaN hetero structure are promising power devices with lower on-state resistance and higher breakdown voltage for power switching applications. In this paper, the current status of the devices for integrated circuits and their application to power switching systems are reviewed, after explaining the basic technologies for decreasing on-resistance, increasing breakdown voltage, and suppressing current collapse. In addition, a solution to increase switching frequency of GITs for smaller system size is described. The effects of integrated circuit of DC/DC converter consisted of gate driver, high-side GIT and low-side GIT with short gate length are also examined.","PeriodicalId":186544,"journal":{"name":"2016 IEEE International Electron Devices Meeting (IEDM)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115005475","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-12-01DOI: 10.1109/IEDM.2016.7838505
M. Shur
Feature sizes of advanced commercial electronic devices are now smaller than the mean free path of the electron collisions with impurities and lattice vibrations. This completely changes the physics of the electron transport. The effective field effect mobility becomes proportional to the device length because the electrons lose their drift momentum in the contacts. The high frequency impedance is strongly affected by the electron inertia and by the phase delays of the opposing electron fluxes in the device channel. The waves of the electron density (plasma waves) enable the device response well into the terahertz (THz) range of frequencies. At high excitation levels, these waves are transformed into the shock waves. The rectification and instabilities of the plasma waves enable a new generation of THz plasmonic devices.
{"title":"Physics of ultrahigh speed electronic devices","authors":"M. Shur","doi":"10.1109/IEDM.2016.7838505","DOIUrl":"https://doi.org/10.1109/IEDM.2016.7838505","url":null,"abstract":"Feature sizes of advanced commercial electronic devices are now smaller than the mean free path of the electron collisions with impurities and lattice vibrations. This completely changes the physics of the electron transport. The effective field effect mobility becomes proportional to the device length because the electrons lose their drift momentum in the contacts. The high frequency impedance is strongly affected by the electron inertia and by the phase delays of the opposing electron fluxes in the device channel. The waves of the electron density (plasma waves) enable the device response well into the terahertz (THz) range of frequencies. At high excitation levels, these waves are transformed into the shock waves. The rectification and instabilities of the plasma waves enable a new generation of THz plasmonic devices.","PeriodicalId":186544,"journal":{"name":"2016 IEEE International Electron Devices Meeting (IEDM)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126615353","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-12-01DOI: 10.1109/IEDM.2016.7838388
M. Hua, Zhaofu Zhang, Jin Wei, Jiacheng Lei, Gaofei Tang, K. Fu, Yong Cai, Baoshun Zhang, K. J. Chen
By employing an interface protection technique to overcome the degradation of etched GaN surface in high-temperature process, highly reliable LPCVD-SiNx gate dielectric was successfully integrated with recessed-gate structure to achieve high-performance enhancement-mode (Vth ∼ +2.37 V @ Id = 100 μA/mm) GaN MIS-FETs with high stability and high reliability. The LPCVD-SiNx/GaN MIS-FET delivers remarkable advantages in high Vth thermal stability, long time-dependent gate dielectric breakdown (TDDB) lifetime and low bias temperature instability (BTI).
利用界面保护技术克服高温过程中蚀刻GaN表面的退化，成功地将高可靠的LPCVD-SiNx栅介电介质与凹栅结构集成在一起，实现了高稳定性和高可靠性的高性能增强模式(Vth ~ +2.37 V @ Id = 100 μA/mm) GaN mis - fet。LPCVD-SiNx/GaN MIS-FET具有高Vth热稳定性、长时间依赖性栅极介电击穿(TDDB)寿命和低偏置温度不稳定性(BTI)等显著优势。
{"title":"Integration of LPCVD-SiNx gate dielectric with recessed-gate E-mode GaN MIS-FETs: Toward high performance, high stability and long TDDB lifetime","authors":"M. Hua, Zhaofu Zhang, Jin Wei, Jiacheng Lei, Gaofei Tang, K. Fu, Yong Cai, Baoshun Zhang, K. J. Chen","doi":"10.1109/IEDM.2016.7838388","DOIUrl":"https://doi.org/10.1109/IEDM.2016.7838388","url":null,"abstract":"By employing an interface protection technique to overcome the degradation of etched GaN surface in high-temperature process, highly reliable LPCVD-SiN<inf>x</inf> gate dielectric was successfully integrated with recessed-gate structure to achieve high-performance enhancement-mode (V<inf>th</inf> ∼ +2.37 V @ I<inf>d</inf> = 100 μA/mm) GaN MIS-FETs with high stability and high reliability. The LPCVD-SiN<inf>x</inf>/GaN MIS-FET delivers remarkable advantages in high Vth thermal stability, long time-dependent gate dielectric breakdown (TDDB) lifetime and low bias temperature instability (BTI).","PeriodicalId":186544,"journal":{"name":"2016 IEEE International Electron Devices Meeting (IEDM)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122358569","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-12-01DOI: 10.1109/IEDM.2016.7838412
M. Trupke, C. Salter, S. Reisenbauer, R. Vasconcelos, G. Wachter, K. Buczak, A. Angerer, J. Schmiedmayer, F. Aumayr, U. Schmid, P. Walther, W. Munro, K. Nemoto
Luminescent defects in crystals are prime candidates for the creation of a quantum technology given their superlative spin coherence lifetimes. Here we describe the main features of a quantum technology based on crystalline defects which builds upon the impressive recent achievements in diamond research. The basic features of the architecture and the requirements for its implementation are outlined, together with experimental progress and practical considerations towards its realization.
{"title":"Large-scale quantum technology based on luminescent centers in crystals","authors":"M. Trupke, C. Salter, S. Reisenbauer, R. Vasconcelos, G. Wachter, K. Buczak, A. Angerer, J. Schmiedmayer, F. Aumayr, U. Schmid, P. Walther, W. Munro, K. Nemoto","doi":"10.1109/IEDM.2016.7838412","DOIUrl":"https://doi.org/10.1109/IEDM.2016.7838412","url":null,"abstract":"Luminescent defects in crystals are prime candidates for the creation of a quantum technology given their superlative spin coherence lifetimes. Here we describe the main features of a quantum technology based on crystalline defects which builds upon the impressive recent achievements in diamond research. The basic features of the architecture and the requirements for its implementation are outlined, together with experimental progress and practical considerations towards its realization.","PeriodicalId":186544,"journal":{"name":"2016 IEEE International Electron Devices Meeting (IEDM)","volume":"145 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122946895","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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