{"title":"慢波耦合振荡器的三维晶圆级集成设计","authors":"Yujie Hua, Cheng-rui Zhang, Liang Zhou, J. Mao","doi":"10.1109/EDAPS.2017.8276929","DOIUrl":null,"url":null,"abstract":"This paper demonstrated the design methodology of 3 dimensional wafer level integrations of slow wave coupled oscillators. The Q factors have been calculated, compared and improved with the transmission line resonators. In order to minimize the size of the oscillator, we used multilayer BCB to integrate the GaAs FET low noise amplifier and slow wave resonators. Finally the phase noise of the packaged oscillator has been calculated.","PeriodicalId":329279,"journal":{"name":"2017 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Design of 3-dimensional wafer level integrations of slow-wave coupled oscillators\",\"authors\":\"Yujie Hua, Cheng-rui Zhang, Liang Zhou, J. Mao\",\"doi\":\"10.1109/EDAPS.2017.8276929\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper demonstrated the design methodology of 3 dimensional wafer level integrations of slow wave coupled oscillators. The Q factors have been calculated, compared and improved with the transmission line resonators. In order to minimize the size of the oscillator, we used multilayer BCB to integrate the GaAs FET low noise amplifier and slow wave resonators. Finally the phase noise of the packaged oscillator has been calculated.\",\"PeriodicalId\":329279,\"journal\":{\"name\":\"2017 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)\",\"volume\":\"56 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDAPS.2017.8276929\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDAPS.2017.8276929","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of 3-dimensional wafer level integrations of slow-wave coupled oscillators
This paper demonstrated the design methodology of 3 dimensional wafer level integrations of slow wave coupled oscillators. The Q factors have been calculated, compared and improved with the transmission line resonators. In order to minimize the size of the oscillator, we used multilayer BCB to integrate the GaAs FET low noise amplifier and slow wave resonators. Finally the phase noise of the packaged oscillator has been calculated.