基于符号数多值算术电路的残数算术电路

Shugang Wei, K. Shimizu
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引用次数: 9

摘要

提出了以整数4/sup p/和4/sup p//spl plusmn/1为剩余数系统(RNS)模的多值剩余算术电路。传统的残数运算电路是利用二进制数运算系统设计的,但残数模块中存在进位传播问题,限制了运算速度。本文介绍了一种基数-4符号数(SD)数系统,并将基于多值电流模式电路的紧凑SD加法器应用于高速紧凑的残差算术电路的实现。模m加法,m=4/sup p/或m=4/sup p//spl plusmn/1,可以通过SD加法器或端部进位SD加法器与多值电路进行,加法时间与操作数字长无关。模m乘法器可以用基于多值加法电路的二进制模m SD加法器树紧凑地构造,模m乘法可以在与log/sub 2/p成比例的时间内完成。
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Residue arithmetic circuits based on the signed-digit multiple-valued arithmetic circuits
Multiple-valued residue arithmetic circuits using integers 4/sup p/ and 4/sup p//spl plusmn/1 as moduli of residue number system (RNS) are presented. Conventional residue arithmetic circuits have been designed using binary number arithmetic system, but the carry propagation arises which limits the speed of arithmetic operations in residue modules. In this paper, a radix-4 signed-digit (SD) number system is introduced, and the compact SD adder based on the multiple-valued current-mode circuits is applied for the implementation of high-speed and compact residue arithmetic circuits. The modulo m addition, m=4/sup p/ or m=4/sup p//spl plusmn/1, can be performed by an SD adder or an end-around-carry SD adder with the multiple-valued circuits and the addition time was independent of the word length of operands. Modulo m multiplier can be compactly constructed using a binary modulo m SD adder tree based on the multiple-valued addition circuits, and the modulo m multiplication can be performed in a time proportional to log/sub 2/p.
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