{"title":"时钟半浮栅超低压对称双向电流反射镜","authors":"Y. Berg, O. Mirmotahari","doi":"10.1109/SOCCON.2009.5398034","DOIUrl":null,"url":null,"abstract":"In this paper we present a low voltage symmetric and bidirectional current mirror based on clocked semi-floating-gate (CSFG) transistors used in low-voltage digital CMOS circuits [1]. By imposing offsets to semi-floating-gate nodes the current level may be increased while maintaining a very low supply voltage. The offset voltages are used to shift the effective threshold voltage of the evaluating transistors. The proposed current mirror can operate at supply voltages below 200mV. The simulated data presented are obtained using the Spectre simulator provided by Cadence and valid for a 90nm CMOS process.","PeriodicalId":303505,"journal":{"name":"2009 IEEE International SOC Conference (SOCC)","volume":"212 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Clocked semi-floating-gate ultra low-voltage symmetric and bidirectional current mirror\",\"authors\":\"Y. Berg, O. Mirmotahari\",\"doi\":\"10.1109/SOCCON.2009.5398034\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper we present a low voltage symmetric and bidirectional current mirror based on clocked semi-floating-gate (CSFG) transistors used in low-voltage digital CMOS circuits [1]. By imposing offsets to semi-floating-gate nodes the current level may be increased while maintaining a very low supply voltage. The offset voltages are used to shift the effective threshold voltage of the evaluating transistors. The proposed current mirror can operate at supply voltages below 200mV. The simulated data presented are obtained using the Spectre simulator provided by Cadence and valid for a 90nm CMOS process.\",\"PeriodicalId\":303505,\"journal\":{\"name\":\"2009 IEEE International SOC Conference (SOCC)\",\"volume\":\"212 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 IEEE International SOC Conference (SOCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCCON.2009.5398034\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE International SOC Conference (SOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCCON.2009.5398034","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Clocked semi-floating-gate ultra low-voltage symmetric and bidirectional current mirror
In this paper we present a low voltage symmetric and bidirectional current mirror based on clocked semi-floating-gate (CSFG) transistors used in low-voltage digital CMOS circuits [1]. By imposing offsets to semi-floating-gate nodes the current level may be increased while maintaining a very low supply voltage. The offset voltages are used to shift the effective threshold voltage of the evaluating transistors. The proposed current mirror can operate at supply voltages below 200mV. The simulated data presented are obtained using the Spectre simulator provided by Cadence and valid for a 90nm CMOS process.