{"title":"40nm制程0.6 V亚阈值运算放大器的设计","authors":"Khristopherson C. Cajucom, F. Cruz, G. Magwili","doi":"10.1109/HNICEM51456.2020.9400122","DOIUrl":null,"url":null,"abstract":"Operational amplifiers are one of the most useful and basic circuit building blocks for analog design. With the continuous technological advancement, most applications, especially on healthcare, demanded low voltage and low power consumption for analog front-end op-amp design. As process technology has become increasingly smaller, the MOS transistors can operate at smaller VGS, VTH, and VDS voltage. This study focuses on designing an op-amp capable of operating at 0.6 V supply voltage under low power condition using sub-threshold region of operation using the 40 nm process technology. The proposed circuit has less than 10 uW power consumption with 13 uV/° $C$ output drift. Design simulation using Monte Carlo is used due to simplicity, optimization and straight forward approximate solution.","PeriodicalId":230810,"journal":{"name":"2020 IEEE 12th International Conference on Humanoid, Nanotechnology, Information Technology, Communication and Control, Environment, and Management (HNICEM)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-12-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design of 0.6 V Sub-Threshold Operational Amplifier in 40 Nm Process\",\"authors\":\"Khristopherson C. Cajucom, F. Cruz, G. Magwili\",\"doi\":\"10.1109/HNICEM51456.2020.9400122\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Operational amplifiers are one of the most useful and basic circuit building blocks for analog design. With the continuous technological advancement, most applications, especially on healthcare, demanded low voltage and low power consumption for analog front-end op-amp design. As process technology has become increasingly smaller, the MOS transistors can operate at smaller VGS, VTH, and VDS voltage. This study focuses on designing an op-amp capable of operating at 0.6 V supply voltage under low power condition using sub-threshold region of operation using the 40 nm process technology. The proposed circuit has less than 10 uW power consumption with 13 uV/° $C$ output drift. Design simulation using Monte Carlo is used due to simplicity, optimization and straight forward approximate solution.\",\"PeriodicalId\":230810,\"journal\":{\"name\":\"2020 IEEE 12th International Conference on Humanoid, Nanotechnology, Information Technology, Communication and Control, Environment, and Management (HNICEM)\",\"volume\":\"45 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-12-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE 12th International Conference on Humanoid, Nanotechnology, Information Technology, Communication and Control, Environment, and Management (HNICEM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/HNICEM51456.2020.9400122\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 12th International Conference on Humanoid, Nanotechnology, Information Technology, Communication and Control, Environment, and Management (HNICEM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HNICEM51456.2020.9400122","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of 0.6 V Sub-Threshold Operational Amplifier in 40 Nm Process
Operational amplifiers are one of the most useful and basic circuit building blocks for analog design. With the continuous technological advancement, most applications, especially on healthcare, demanded low voltage and low power consumption for analog front-end op-amp design. As process technology has become increasingly smaller, the MOS transistors can operate at smaller VGS, VTH, and VDS voltage. This study focuses on designing an op-amp capable of operating at 0.6 V supply voltage under low power condition using sub-threshold region of operation using the 40 nm process technology. The proposed circuit has less than 10 uW power consumption with 13 uV/° $C$ output drift. Design simulation using Monte Carlo is used due to simplicity, optimization and straight forward approximate solution.