R. Domingo, R. Salvador, H. Fabelo, D. Madroñal, S. Ortega, R. Lazcano, E. Juárez, G. Callicó, C. Sanz
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引用次数: 17
摘要
当前的计算需求要求提高设计人员的效率和每瓦特的系统性能。一个被广泛接受的高效加速器实现方案是可重构计算。然而,典型的HDL方法需要非常特殊的技能和大量的设计时间。尽管有像OpenCL这样的高级综合的新方法,但考虑到当今设备(多核、cpu、gpu、fpga)的巨大异构性,没有放之万用的解决方案,因此为了最大化性能,需要平台驱动的优化。本文综述了利用Intel FPGA SDK实现OpenCL的最新研究成果及其优化策略,对高光谱图像空间光谱分类器加速器的设计框架进行了评价。报告了使用Intel FPGA OpenCL离线编译器16.0开箱即用的Cyclone V SoC的结果。从运行在嵌入式ARM®Cortex®-A9上的通用基线C实现开始,基于opencl的合成应用不同的通用和特定于供应商的优化进行评估。结果表明如何在计算资源和嵌入式内存资源稀缺的设备上获得合理的加速。似乎已经迈出了一大步,有效地提高了抽象层次,但仍然需要相当数量的硬件设计技能。
High-level design using Intel FPGA OpenCL: A hyperspectral imaging spatial-spectral classifier
Current computational demands require increasing designer's efficiency and system performance per watt. A broadly accepted solution for efficient accelerators implementation is reconfigurable computing. However, typical HDL methodologies require very specific skills and a considerable amount of designer's time. Despite the new approaches to high-level synthesis like OpenCL, given the large heterogeneity in today's devices (manycore, CPUs, GPUs, FPGAs), there is no one-fits-all solution, so to maximize performance, platform-driven optimization is needed. This paper reviews some latest works using Intel FPGA SDK for OpenCL and the strategies for optimization, evaluating the framework for the design of a hyperspectral image spatial-spectral classifier accelerator. Results are reported for a Cyclone V SoC using Intel FPGA OpenCL Offline Compiler 16.0 out-of-the-box. From a common baseline C implementation running on the embedded ARM® Cortex®-A9, OpenCL-based synthesis is evaluated applying different generic and vendor specific optimizations. Results show how reasonable speedups are obtained in a device with scarce computing and embedded memory resources. It seems a great step has been given to effectively raise the abstraction level, but still, a considerable amount of HW design skills is needed.