{"title":"以硅化钴为扩散源形成超浅结","authors":"S. Kal, I. Kasko, H. Ryssel","doi":"10.1109/TENCON.1995.496394","DOIUrl":null,"url":null,"abstract":"Ultra-thin CoSi/sub 2/ films were prepared from 10 nm sputtered deposited Co on Si using RTA. The distribution of As ions implanted into thin layers of CoSi/sub 2/ on monocrystalline Si and out-diffusion into Si substrate during furnace annealing and RTP were investigated. Ultra-shallow junctions (x/sub j/<100 nm) were characterized by fabricating diodes.","PeriodicalId":425138,"journal":{"name":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Ultra-shallow junction formation using cobalt silicide as diffusion source\",\"authors\":\"S. Kal, I. Kasko, H. Ryssel\",\"doi\":\"10.1109/TENCON.1995.496394\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Ultra-thin CoSi/sub 2/ films were prepared from 10 nm sputtered deposited Co on Si using RTA. The distribution of As ions implanted into thin layers of CoSi/sub 2/ on monocrystalline Si and out-diffusion into Si substrate during furnace annealing and RTP were investigated. Ultra-shallow junctions (x/sub j/<100 nm) were characterized by fabricating diodes.\",\"PeriodicalId\":425138,\"journal\":{\"name\":\"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings\",\"volume\":\"6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-11-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TENCON.1995.496394\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TENCON.1995.496394","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Ultra-shallow junction formation using cobalt silicide as diffusion source
Ultra-thin CoSi/sub 2/ films were prepared from 10 nm sputtered deposited Co on Si using RTA. The distribution of As ions implanted into thin layers of CoSi/sub 2/ on monocrystalline Si and out-diffusion into Si substrate during furnace annealing and RTP were investigated. Ultra-shallow junctions (x/sub j/<100 nm) were characterized by fabricating diodes.
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