Analytical model for energy recovery circuit of plasma display panel data driver integrated circuit

An analytical model is proposed to analyse the energy recovery circuit (ERC) efficiency of plasma display panel (PDP) data driver integrated circuit (IC). The experimental measurements agree with the analysis results very well. The analysis results show that the ERC efficiency of PDP data driver IC is influenced by three factors: the value of charge time T ERC , the channel resistor R on and the capacitance of C L . The range of T ERC is restricted in actual PDP system. C L is determined by physical parameters of PDP panel, and its value is nearly changeless. Therefore the ERC efficiency of PDP data driver IC can be improved significantly by using superior DPLD (double-channel p-type lateral extended drain metal oxidesemi conductor) transistor that has smaller R on .