利用高级综合技术进行空间协处理器设计探索

Avinash Lakshminarayana, Sumit Ahuja, S. Shukla
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引用次数: 5

摘要

硬件/软件协同设计作为一个研究领域已经有几十年了。目前,协同设计用于为系统的计算密集型任务创建硬件协处理器(否则,在软件中执行,将无法满足性能目标)。设计具有面积、时序和功耗限制的正确硬件协处理器是一项耗时的任务。在本文中,我们提出了一种在一定程度上缓解这一问题的方法。首先,我们展示了如何在设计空间探索中采用高级综合工具来收敛于高效的硬件协处理器。其次,我们通过一系列案例研究表明,牢记特定平台优化的系统级方法可以帮助有效地进行此类探索。
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Coprocessor design space exploration using high level synthesis
Hardware/software co-design has been an area of research for a few decades. Currently co-design is utilized to create hardware coprocessors for compute intensive tasks of a system (which otherwise, performed in software, will not meet the performance goals). Design of correct hardware coprocessors with area, timing and power constraints is a time consuming task. In this paper, we present a methodology to alleviate this problem up to a certain extent. First, we show how to adopt a high-level synthesis tool in design space exploration to converge towards efficient hardware coprocessors. Second, we show, through a series of case studies that, a system-level approach, keeping platform specific optimizations in mind, can help in doing such an exploration efficiently.
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