系统级模拟CIM加速器仿真框架:非理想元件的精确仿真

F. García-Redondo, Ali BanaGozar, K. Vadivel, H. Corporaal, Shidhartha Das
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SACA: System-level Analog CIM Accelerators Simulation Framework: Accurate Simulation of Non-Ideal Components
Always-ON accelerators running TinyML applications are strongly limited by the memory and computation resources available in edge devices. Compute-In-Memory (CIM) architectures based on non-volatile memories (NVM) promise to bring the required compute and memory demands of Deep Neural Networks (DNN) to the edge while consuming extremely low power. However, their system-level design is constrained by the device and periphery noise which strongly impacts and compromises the accuracy of the DNN workload. In this paper SACA, a framework for simulating host & CIM accelerator systems, is presented. The simulator quantifies the system reliability by taking into account device-level non-idealities. The accuracy of two representative TinyML workloads is analyzed based on the crossbar characteristics -NVM technology, crossbar size, periphery characteristics. To demonstrate the capabilities of SACA, extensive experiments are carried out. We have characterized a convolutional network tackling CIFAR10 image classification and a fully connected network performing Human Activity Recognition. The results lead to optimal energy/performance/accuracy profiles, while the overall analysis highlights the dramatic effects of IR-drop on larger crossbars, degrading the system's accuracy and compromising its reliability.
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SACA: System-level Analog CIM Accelerators Simulation Framework: Accurate Simulation of Non-Ideal Components SACA: System-level Analog CIM Accelerators Simulation Framework: Architecture and Cycle-accurate System-to-device Simulator
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