用于基板和组件级封装的制造和组装的全添加剂聚合工艺

C. Gallagher, P. Gandhi, G. Matijasevic
{"title":"用于基板和组件级封装的制造和组装的全添加剂聚合工艺","authors":"C. Gallagher, P. Gandhi, G. Matijasevic","doi":"10.1109/PEP.1997.656473","DOIUrl":null,"url":null,"abstract":"A novel base technology that is applicable to all major packaging and redistribution elements in an electronic module is presented. A single family of polymer/metal composite conductors can be used for chip packaging redistribution layers, MCM or multilayer PWB interconnects, and SMT assembly. High density multilayer circuits with landless blind and buried vias can be fabricated by filling conductor paste into photoimaged dielectrics and thermal processing. Via layers are prepared directly on the inherently planarized circuit layer in identical fashion. Building up layers sequentially in this manner results in multilayer circuits built on a single substrate layer and minimizes the number of interfaces between dissimilar materials. As these composite materials are applied in an additive fabrication method, metal substrates can be employed for high thermal dissipation and excellent CTE control over a wide temperature range. Two variants of the composite conductor can successfully replace solder for surface mount and chip on board assembly. These reliable, highly thermally and electrically conductive materials are compatible with standard metal finishes and can be adopted piecemeal as desired; however, the largest reliability and cost benefit is realized when all of the elements are used in conjunction. The conductor materials are based on interpenetrating polymer and metal networks that are formed in situ from metal particles and a thermosetting flux/binder.","PeriodicalId":340973,"journal":{"name":"Proceedings. The First IEEE International Symposium on Polymeric Electronics Packaging, PEP '97 (Cat. No.97TH8268)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A fully additive, polymeric process for the fabrication and assembly of substrate and component level packaging\",\"authors\":\"C. Gallagher, P. Gandhi, G. Matijasevic\",\"doi\":\"10.1109/PEP.1997.656473\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A novel base technology that is applicable to all major packaging and redistribution elements in an electronic module is presented. A single family of polymer/metal composite conductors can be used for chip packaging redistribution layers, MCM or multilayer PWB interconnects, and SMT assembly. High density multilayer circuits with landless blind and buried vias can be fabricated by filling conductor paste into photoimaged dielectrics and thermal processing. Via layers are prepared directly on the inherently planarized circuit layer in identical fashion. Building up layers sequentially in this manner results in multilayer circuits built on a single substrate layer and minimizes the number of interfaces between dissimilar materials. As these composite materials are applied in an additive fabrication method, metal substrates can be employed for high thermal dissipation and excellent CTE control over a wide temperature range. Two variants of the composite conductor can successfully replace solder for surface mount and chip on board assembly. These reliable, highly thermally and electrically conductive materials are compatible with standard metal finishes and can be adopted piecemeal as desired; however, the largest reliability and cost benefit is realized when all of the elements are used in conjunction. The conductor materials are based on interpenetrating polymer and metal networks that are formed in situ from metal particles and a thermosetting flux/binder.\",\"PeriodicalId\":340973,\"journal\":{\"name\":\"Proceedings. The First IEEE International Symposium on Polymeric Electronics Packaging, PEP '97 (Cat. No.97TH8268)\",\"volume\":\"2 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-10-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. The First IEEE International Symposium on Polymeric Electronics Packaging, PEP '97 (Cat. No.97TH8268)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/PEP.1997.656473\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. The First IEEE International Symposium on Polymeric Electronics Packaging, PEP '97 (Cat. No.97TH8268)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PEP.1997.656473","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

摘要

提出了一种适用于电子模块中所有主要封装和再分配元件的新型基础技术。单一系列的聚合物/金属复合导体可用于芯片封装再分配层、MCM或多层PWB互连以及SMT组装。通过在光成像介质中填充导体浆料并进行热处理,可以制备出无地盲埋过孔的高密度多层电路。通过层以相同的方式直接在固有平面化的电路层上制备。以这种方式依次构建层,可以在单个基板层上构建多层电路,并最大限度地减少不同材料之间的接口数量。由于这些复合材料应用于增材制造方法,金属基板可以在宽温度范围内具有高散热和出色的CTE控制。复合导体的两种变体可以成功地取代表面贴装和板上芯片组装的焊料。这些可靠,高导热和导电性的材料与标准金属饰面兼容,并可根据需要采用分段;然而,最大的可靠性和成本效益是实现当所有的元素结合使用。导体材料基于互穿聚合物和由金属颗粒和热固性助熔剂/粘合剂原位形成的金属网络。
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A fully additive, polymeric process for the fabrication and assembly of substrate and component level packaging
A novel base technology that is applicable to all major packaging and redistribution elements in an electronic module is presented. A single family of polymer/metal composite conductors can be used for chip packaging redistribution layers, MCM or multilayer PWB interconnects, and SMT assembly. High density multilayer circuits with landless blind and buried vias can be fabricated by filling conductor paste into photoimaged dielectrics and thermal processing. Via layers are prepared directly on the inherently planarized circuit layer in identical fashion. Building up layers sequentially in this manner results in multilayer circuits built on a single substrate layer and minimizes the number of interfaces between dissimilar materials. As these composite materials are applied in an additive fabrication method, metal substrates can be employed for high thermal dissipation and excellent CTE control over a wide temperature range. Two variants of the composite conductor can successfully replace solder for surface mount and chip on board assembly. These reliable, highly thermally and electrically conductive materials are compatible with standard metal finishes and can be adopted piecemeal as desired; however, the largest reliability and cost benefit is realized when all of the elements are used in conjunction. The conductor materials are based on interpenetrating polymer and metal networks that are formed in situ from metal particles and a thermosetting flux/binder.
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