{"title":"采用自动校准多通环振荡器的5.4GHz宽调谐范围CMOS锁相环","authors":"P. Lu, Danfeng Chen, Fan Ye, Junyan Ren","doi":"10.1109/SOCCON.2009.5398102","DOIUrl":null,"url":null,"abstract":"A 5.4GHz multiple-pass ring voltage controlled oscillator (VCO) based phase-locked loop (PLL) is described. For the sake of active devices' sensitivity to process and temperature regarding ring oscillators, an effective automatic frequency calibration scheme is proposed. A new process-independent differential to single (DTOS) is used to adjust control voltage range and loop gain. The chip is implemented in 0.18-um CMOS process and achieves phase noise of −100dBc/Hz@1MHz and a 40% tuning range.","PeriodicalId":303505,"journal":{"name":"2009 IEEE International SOC Conference (SOCC)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 5.4GHz wide tuning range CMOS PLL using an auto-calibration multiple-pass ring oscillator\",\"authors\":\"P. Lu, Danfeng Chen, Fan Ye, Junyan Ren\",\"doi\":\"10.1109/SOCCON.2009.5398102\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 5.4GHz multiple-pass ring voltage controlled oscillator (VCO) based phase-locked loop (PLL) is described. For the sake of active devices' sensitivity to process and temperature regarding ring oscillators, an effective automatic frequency calibration scheme is proposed. A new process-independent differential to single (DTOS) is used to adjust control voltage range and loop gain. The chip is implemented in 0.18-um CMOS process and achieves phase noise of −100dBc/Hz@1MHz and a 40% tuning range.\",\"PeriodicalId\":303505,\"journal\":{\"name\":\"2009 IEEE International SOC Conference (SOCC)\",\"volume\":\"19 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 IEEE International SOC Conference (SOCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCCON.2009.5398102\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE International SOC Conference (SOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCCON.2009.5398102","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
介绍了一种基于5.4GHz多通环压控振荡器(VCO)的锁相环。针对环振有源器件对工艺和温度的敏感性，提出了一种有效的频率自动校准方案。采用一种新的过程无关的差分到单(DTOS)来调节控制电压范围和环路增益。该芯片采用0.18 um CMOS工艺实现，相位噪声为−100dBc/Hz@1MHz，调谐范围为40%。
A 5.4GHz wide tuning range CMOS PLL using an auto-calibration multiple-pass ring oscillator
A 5.4GHz multiple-pass ring voltage controlled oscillator (VCO) based phase-locked loop (PLL) is described. For the sake of active devices' sensitivity to process and temperature regarding ring oscillators, an effective automatic frequency calibration scheme is proposed. A new process-independent differential to single (DTOS) is used to adjust control voltage range and loop gain. The chip is implemented in 0.18-um CMOS process and achieves phase noise of −100dBc/Hz@1MHz and a 40% tuning range.
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