{"title":"基于Tasca法的功率MOSFET超应力脉冲断电模型","authors":"N. S. Ismail, I. Ahmad, H. Husain, S. Chuah","doi":"10.1109/SMELEC.2006.380790","DOIUrl":null,"url":null,"abstract":"The objective of this research is to study electrical overstress (EOS) defect at gate oxide for various pulse widths in n-channel power metal-oxide-semiconductor field effect transistor (MOSFET). Moreover, this research also intent to develop power failure model for n-channel power MOSFET according to Tasca method. Electrical overstress does not have EOS standards and quantitative EOS design objectives to tackle this problem. Square pulse testing is used in this research due to easy to generate and simple to analyze. Time-to-failure (tf) is taken for power profiles modeling by observing abrupt drop in voltage waveform seen on oscilloscope. Tasca derived the thermal model by regarded the defect area as a sphere immersed in an infinite medium at ambient temperature. Result from failure analysis on all failed units had shown that hot spot formations begin at gate runner of the die and pulse stress given on VGS has cause gate oxide breakdown. Pulse power failure model for device n-channel power MOSFET can be obtained using Tasca method.","PeriodicalId":136703,"journal":{"name":"2006 IEEE International Conference on Semiconductor Electronics","volume":"2014 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Pulse Power Failure Model Of Power MOSFET Due To Electrical Overstress Using Tasca Method\",\"authors\":\"N. S. Ismail, I. Ahmad, H. Husain, S. Chuah\",\"doi\":\"10.1109/SMELEC.2006.380790\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The objective of this research is to study electrical overstress (EOS) defect at gate oxide for various pulse widths in n-channel power metal-oxide-semiconductor field effect transistor (MOSFET). Moreover, this research also intent to develop power failure model for n-channel power MOSFET according to Tasca method. Electrical overstress does not have EOS standards and quantitative EOS design objectives to tackle this problem. Square pulse testing is used in this research due to easy to generate and simple to analyze. Time-to-failure (tf) is taken for power profiles modeling by observing abrupt drop in voltage waveform seen on oscilloscope. Tasca derived the thermal model by regarded the defect area as a sphere immersed in an infinite medium at ambient temperature. Result from failure analysis on all failed units had shown that hot spot formations begin at gate runner of the die and pulse stress given on VGS has cause gate oxide breakdown. Pulse power failure model for device n-channel power MOSFET can be obtained using Tasca method.\",\"PeriodicalId\":136703,\"journal\":{\"name\":\"2006 IEEE International Conference on Semiconductor Electronics\",\"volume\":\"2014 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE International Conference on Semiconductor Electronics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SMELEC.2006.380790\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE International Conference on Semiconductor Electronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMELEC.2006.380790","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Pulse Power Failure Model Of Power MOSFET Due To Electrical Overstress Using Tasca Method
The objective of this research is to study electrical overstress (EOS) defect at gate oxide for various pulse widths in n-channel power metal-oxide-semiconductor field effect transistor (MOSFET). Moreover, this research also intent to develop power failure model for n-channel power MOSFET according to Tasca method. Electrical overstress does not have EOS standards and quantitative EOS design objectives to tackle this problem. Square pulse testing is used in this research due to easy to generate and simple to analyze. Time-to-failure (tf) is taken for power profiles modeling by observing abrupt drop in voltage waveform seen on oscilloscope. Tasca derived the thermal model by regarded the defect area as a sphere immersed in an infinite medium at ambient temperature. Result from failure analysis on all failed units had shown that hot spot formations begin at gate runner of the die and pulse stress given on VGS has cause gate oxide breakdown. Pulse power failure model for device n-channel power MOSFET can be obtained using Tasca method.