{"title":"产量应该是一个设计目标吗?","authors":"I. Koren","doi":"10.1109/ISQED.2000.838863","DOIUrl":null,"url":null,"abstract":"The objectives of good chip design have traditionally included issues like performance, power and reliability. Yield is rarely considered during the design process, except in the design of memory ICs, where specific defect-tolerance techniques are incorporated into the architecture for yield enhancement. In order to make the case for establishing yield as another design objective we must first prove that a chip's yield cannot only be affected, but consistently improved, by decisions made during the design process.","PeriodicalId":113766,"journal":{"name":"Proceedings IEEE 2000 First International Symposium on Quality Electronic Design (Cat. No. PR00525)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":"{\"title\":\"Should yield be a design objective?\",\"authors\":\"I. Koren\",\"doi\":\"10.1109/ISQED.2000.838863\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The objectives of good chip design have traditionally included issues like performance, power and reliability. Yield is rarely considered during the design process, except in the design of memory ICs, where specific defect-tolerance techniques are incorporated into the architecture for yield enhancement. In order to make the case for establishing yield as another design objective we must first prove that a chip's yield cannot only be affected, but consistently improved, by decisions made during the design process.\",\"PeriodicalId\":113766,\"journal\":{\"name\":\"Proceedings IEEE 2000 First International Symposium on Quality Electronic Design (Cat. No. PR00525)\",\"volume\":\"3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-03-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"13\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings IEEE 2000 First International Symposium on Quality Electronic Design (Cat. No. PR00525)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISQED.2000.838863\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings IEEE 2000 First International Symposium on Quality Electronic Design (Cat. No. PR00525)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED.2000.838863","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 13

摘要

传统上,优秀芯片设计的目标包括性能、功率和可靠性等问题。在设计过程中很少考虑良率,除了在内存ic的设计中,其中特定的缺陷容忍技术被纳入到架构中以提高良率。为了将成品率作为另一个设计目标,我们必须首先证明芯片的成品率不仅会受到设计过程中所做决策的影响,而且会不断提高。
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Should yield be a design objective?
The objectives of good chip design have traditionally included issues like performance, power and reliability. Yield is rarely considered during the design process, except in the design of memory ICs, where specific defect-tolerance techniques are incorporated into the architecture for yield enhancement. In order to make the case for establishing yield as another design objective we must first prove that a chip's yield cannot only be affected, but consistently improved, by decisions made during the design process.
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