M. Lang, Z. Wang, A. Thiede, H. Lienhart, T. Jakobus, W. Bronner, J. Hornung, A. Hulsmann
{"title":"一个完整的GaAs HEMT单芯片数据接收器,数据速率为40 Gbit/s","authors":"M. Lang, Z. Wang, A. Thiede, H. Lienhart, T. Jakobus, W. Bronner, J. Hornung, A. Hulsmann","doi":"10.1109/GAAS.1998.722624","DOIUrl":null,"url":null,"abstract":"Using our 0.2 /spl mu/m AlGaAs-GaAs-AlGaAs quantum well HEMT technology, we have designed, manufactured and characterized a single chip comprising a clock recovery, a data decision and a 2:4 demultiplexer circuit. The chip is able to receive a data stream of 40 Gbit/s and converts it into a four bit parallel data signal. The results presented here have been measured on wafer.","PeriodicalId":288170,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 20th Annual. Technical Digest 1998 (Cat. No.98CH36260)","volume":"80 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A complete GaAs HEMT single chip data receiver for 40 Gbit/s data rates\",\"authors\":\"M. Lang, Z. Wang, A. Thiede, H. Lienhart, T. Jakobus, W. Bronner, J. Hornung, A. Hulsmann\",\"doi\":\"10.1109/GAAS.1998.722624\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Using our 0.2 /spl mu/m AlGaAs-GaAs-AlGaAs quantum well HEMT technology, we have designed, manufactured and characterized a single chip comprising a clock recovery, a data decision and a 2:4 demultiplexer circuit. The chip is able to receive a data stream of 40 Gbit/s and converts it into a four bit parallel data signal. The results presented here have been measured on wafer.\",\"PeriodicalId\":288170,\"journal\":{\"name\":\"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 20th Annual. Technical Digest 1998 (Cat. No.98CH36260)\",\"volume\":\"80 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 20th Annual. Technical Digest 1998 (Cat. No.98CH36260)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/GAAS.1998.722624\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 20th Annual. Technical Digest 1998 (Cat. No.98CH36260)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GAAS.1998.722624","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A complete GaAs HEMT single chip data receiver for 40 Gbit/s data rates
Using our 0.2 /spl mu/m AlGaAs-GaAs-AlGaAs quantum well HEMT technology, we have designed, manufactured and characterized a single chip comprising a clock recovery, a data decision and a 2:4 demultiplexer circuit. The chip is able to receive a data stream of 40 Gbit/s and converts it into a four bit parallel data signal. The results presented here have been measured on wafer.