{"title":"多通道,紧凑的数据采集系统与内置时间到数字转换器","authors":"K. Prasad, V. Chandratre, M. Sukhwani, R. Shinde","doi":"10.1109/ACCESS57397.2023.10201167","DOIUrl":null,"url":null,"abstract":"this paper describes the aspects of the multi-channel, compact data acquisition systems (DAQs), developed to characterize the front-end electronics (FEE) of the resistive plate chamber detectors (RPCs) being used in India-based neutrino observatory (INO) experiment. The number of RPCs and FEE boards required in the experiment are 29000 and 464000 respectively. It is required to characterize the FEEs along with RPC detectors before the actual deployment in the experiment. The detector parameters that are to be measured for this characterization are strip (noise) rate, muon detection efficiency, and time resolution. Usually, commercial, rack mount level translators, scalars and time-to-digital converters (TDC) are being used to measure these parameters. In the DAQ system presented here, all these functionalities have been integrated in a single compact module thereby resulting in a low cost, multichannel, and compact DAQ system. This paper describes in detail the developmental aspects of 128-channel DAQ system built using Xilinx Spartan-6 FPGAs, ARM Cortex-M4 microcontroller and in-house developed ASIC and FPGA based TDCs. The DAQ system has Ethernet interface and USB interface for data transfer. The system is supported by detailed data analysis software to monitor and measure the parameters in real time. The DAQ is tested with different configurations of RPCs and FEEs. The strip rates of the order of 30 - 200 counts per seconds (CPS), detector efficiency of greater than 90% and timing resolution of 2.4 ns to 2.7 ns are measured using these DAQs.","PeriodicalId":345351,"journal":{"name":"2023 3rd International Conference on Advances in Computing, Communication, Embedded and Secure Systems (ACCESS)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Multi-channel, compact DAQ system with inbuilt Time-to-digital converters\",\"authors\":\"K. Prasad, V. Chandratre, M. Sukhwani, R. Shinde\",\"doi\":\"10.1109/ACCESS57397.2023.10201167\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"this paper describes the aspects of the multi-channel, compact data acquisition systems (DAQs), developed to characterize the front-end electronics (FEE) of the resistive plate chamber detectors (RPCs) being used in India-based neutrino observatory (INO) experiment. The number of RPCs and FEE boards required in the experiment are 29000 and 464000 respectively. It is required to characterize the FEEs along with RPC detectors before the actual deployment in the experiment. The detector parameters that are to be measured for this characterization are strip (noise) rate, muon detection efficiency, and time resolution. Usually, commercial, rack mount level translators, scalars and time-to-digital converters (TDC) are being used to measure these parameters. In the DAQ system presented here, all these functionalities have been integrated in a single compact module thereby resulting in a low cost, multichannel, and compact DAQ system. This paper describes in detail the developmental aspects of 128-channel DAQ system built using Xilinx Spartan-6 FPGAs, ARM Cortex-M4 microcontroller and in-house developed ASIC and FPGA based TDCs. The DAQ system has Ethernet interface and USB interface for data transfer. The system is supported by detailed data analysis software to monitor and measure the parameters in real time. The DAQ is tested with different configurations of RPCs and FEEs. The strip rates of the order of 30 - 200 counts per seconds (CPS), detector efficiency of greater than 90% and timing resolution of 2.4 ns to 2.7 ns are measured using these DAQs.\",\"PeriodicalId\":345351,\"journal\":{\"name\":\"2023 3rd International Conference on Advances in Computing, Communication, Embedded and Secure Systems (ACCESS)\",\"volume\":\"37 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-05-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 3rd International Conference on Advances in Computing, Communication, Embedded and Secure Systems (ACCESS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ACCESS57397.2023.10201167\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 3rd International Conference on Advances in Computing, Communication, Embedded and Secure Systems (ACCESS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ACCESS57397.2023.10201167","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Multi-channel, compact DAQ system with inbuilt Time-to-digital converters
this paper describes the aspects of the multi-channel, compact data acquisition systems (DAQs), developed to characterize the front-end electronics (FEE) of the resistive plate chamber detectors (RPCs) being used in India-based neutrino observatory (INO) experiment. The number of RPCs and FEE boards required in the experiment are 29000 and 464000 respectively. It is required to characterize the FEEs along with RPC detectors before the actual deployment in the experiment. The detector parameters that are to be measured for this characterization are strip (noise) rate, muon detection efficiency, and time resolution. Usually, commercial, rack mount level translators, scalars and time-to-digital converters (TDC) are being used to measure these parameters. In the DAQ system presented here, all these functionalities have been integrated in a single compact module thereby resulting in a low cost, multichannel, and compact DAQ system. This paper describes in detail the developmental aspects of 128-channel DAQ system built using Xilinx Spartan-6 FPGAs, ARM Cortex-M4 microcontroller and in-house developed ASIC and FPGA based TDCs. The DAQ system has Ethernet interface and USB interface for data transfer. The system is supported by detailed data analysis software to monitor and measure the parameters in real time. The DAQ is tested with different configurations of RPCs and FEEs. The strip rates of the order of 30 - 200 counts per seconds (CPS), detector efficiency of greater than 90% and timing resolution of 2.4 ns to 2.7 ns are measured using these DAQs.