{"title":"回收能量逻辑的功耗测量","authors":"R. T. Hinman, F. Martin, Schlecht","doi":"10.1109/VLSIC.1994.586170","DOIUrl":null,"url":null,"abstract":"Recovered Energy Logic is a low power logic topology powered and clocked by a single ac supply volt- age. This paper describes the operation of the circuit and presents measurements showing that this approach can re- duce dissipation by a factor of 5 to 17 over conventional CMOS logic.","PeriodicalId":350730,"journal":{"name":"Proceedings of 1994 IEEE Symposium on VLSI Circuits","volume":"68 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"21","resultStr":"{\"title\":\"Power Dissipation Measurements on Recovered Energy Logic\",\"authors\":\"R. T. Hinman, F. Martin, Schlecht\",\"doi\":\"10.1109/VLSIC.1994.586170\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Recovered Energy Logic is a low power logic topology powered and clocked by a single ac supply volt- age. This paper describes the operation of the circuit and presents measurements showing that this approach can re- duce dissipation by a factor of 5 to 17 over conventional CMOS logic.\",\"PeriodicalId\":350730,\"journal\":{\"name\":\"Proceedings of 1994 IEEE Symposium on VLSI Circuits\",\"volume\":\"68 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-06-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"21\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 1994 IEEE Symposium on VLSI Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.1994.586170\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1994 IEEE Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.1994.586170","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Power Dissipation Measurements on Recovered Energy Logic
Recovered Energy Logic is a low power logic topology powered and clocked by a single ac supply volt- age. This paper describes the operation of the circuit and presents measurements showing that this approach can re- duce dissipation by a factor of 5 to 17 over conventional CMOS logic.